Patents by Inventor In-Seob BAE

In-Seob BAE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200227344
    Abstract: A semiconductor package substrate, in which a base substrate having an upper surface and a lower surface and formed of a conductive material is filled with resin formed of an insulating material, includes a die pad formed of the conductive material on the upper surface and a lead arranged on the upper surface by being electrically separated from the die pad and comprising a bonding pad that is a wire bonding area. A protrusion protruding toward the lower surface is formed in a central area of the bonding pad. A central thickness of the bonding pad is greater than a peripheral thickness of the bonding pad.
    Type: Application
    Filed: March 25, 2020
    Publication date: July 16, 2020
    Inventors: In Seob BAE, Sung Il KANG
  • Publication number: 20200168521
    Abstract: A method of manufacturing a semiconductor package substrate includes forming a trench in one surface of a base substrate formed of a conductive material, performing a first filling operation of filling the trench with resin, performing a first curing operation of semi-curing the resin filled in the first filling operation, performing a second filling operation of additionally filling resin on a semi-cured resin, performing a second curing operation of fully curing the resin, removing the resin exposed from the trench, and etching an opposite surface of the base substrate to expose at least part of the resin filling the trench.
    Type: Application
    Filed: December 5, 2016
    Publication date: May 28, 2020
    Inventors: In Seob BAE, Hyeok Jin JEON
  • Patent number: 10643933
    Abstract: Provided are a semiconductor package substrate and a manufacturing method thereof having improved pattern accuracy and product reliability with simple manufacturing processes. The semiconductor package substrate includes a base substrate having a conductive material, and including a first area, on which chips are mounted, including first recesses or first trenches in a surface, and a second area contacting the first area and including dummy recesses or dummy trenches in a surface; and a resin filled in the first recesses or the first trenches and the dummy recesses or the dummy trenches.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: May 5, 2020
    Assignee: Haesung DS CO., LTD.
    Inventors: In Seob Bae, Sung Il Kang
  • Patent number: 10643932
    Abstract: A semiconductor package substrate, in which a base substrate having an upper surface and a lower surface and formed of a conductive material is filled with resin formed of an insulating material, includes a die pad formed of the conductive material on the upper surface and a lead arranged on the upper surface by being electrically separated from the die pad and comprising a bonding pad that is a wire bonding area. A protrusion protruding toward the lower surface is formed in a central area of the bonding pad. A central thickness of the bonding pad is greater than a peripheral thickness of the bonding pad.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: May 5, 2020
    Assignee: Haesung DS CO., LTD.
    Inventors: In Seob Bae, Sung Il Kang
  • Patent number: 10540315
    Abstract: A computing system is provided. The computing system includes a host device and a plurality of interface devices. The plurality of interface devices is configured to communicate with the host device through a host bus. Each of the plurality of interface devices is configured to perform an interfacing operation between the host device and a memory device. The interfacing operation includes a serial interfacing operation and a parallel interfacing operation.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: January 21, 2020
    Assignee: SK hynix Inc.
    Inventor: Hyung Seob Bae
  • Publication number: 20190267315
    Abstract: Provided are a method of manufacturing a semiconductor package substrate, a semiconductor package substrate manufactured using the method of manufacturing a semiconductor package substrate, a method of manufacturing a semiconductor package, and a semiconductor package manufactured using the method of manufacturing a semiconductor package. The method of manufacturing a semiconductor package substrate includes forming first grooves or first trenches in a bottom surface of a base substrate having a top surface and the bottom surface and formed of a conductive material; filling the first grooves or trenches with resin; curing the resin; removing exposed portions of the resin overfilled in the first grooves or trenches; etching the top surface of the base substrate to expose at least portions of the resin filled in the first grooves or trenches; and forming a second groove or a second trench in the bottom surface of the base substrate.
    Type: Application
    Filed: September 27, 2018
    Publication date: August 29, 2019
    Inventors: In Seob BAE, Sung Il KANG, Dong Jin YOON
  • Publication number: 20190122968
    Abstract: Provided are a semiconductor package substrate and a manufacturing method thereof having improved pattern accuracy and product reliability with simple manufacturing processes. The semiconductor package substrate includes a base substrate having a conductive material, and including a first area, on which chips are mounted, including first recesses or first trenches in a surface, and a second area contacting the first area and including dummy recesses or dummy trenches in a surface; and a resin filled in the first recesses or the first trenches and the dummy recesses or the dummy trenches.
    Type: Application
    Filed: November 14, 2016
    Publication date: April 25, 2019
    Applicant: Haesung DS Co., Ltd.
    Inventors: In Seob BAE, Sung Il KANG
  • Publication number: 20190067082
    Abstract: A method of manufacturing a semiconductor package substrate includes forming a trench and a post by etching an upper surface of a base substrate including a conductive material, filling the trench with a resin, removing the resin exposed to outside of the trench such that an upper surface of the post and an upper surface of the resin are at same level, forming a conductive layer on an entire area of the upper surface of the post and the upper surface of the resin, and forming a circuit wiring including an upper circuit wiring and a lower circuit wiring by simultaneously patterning the conductive layer and a lower surface of the base substrate.
    Type: Application
    Filed: August 30, 2018
    Publication date: February 28, 2019
    Inventors: Sung Il KANG, In Seob BAE, Jea Won KIM
  • Publication number: 20190057930
    Abstract: A semiconductor package substrate, in which a base substrate having an upper surface and a lower surface and formed of a conductive material is filled with resin formed of an insulating material, includes a die pad formed of the conductive material on the upper surface and a lead arranged on the upper surface by being electrically separated from the die pad and comprising a bonding pad that is a wire bonding area. A protrusion protruding toward the lower surface is formed in a central area of the bonding pad. A central thickness of the bonding pad is greater than a peripheral thickness of the bonding pad.
    Type: Application
    Filed: November 10, 2016
    Publication date: February 21, 2019
    Applicant: HAESUNG DS CO., LTD.
    Inventors: In Seob BAE, Sung Il KANG
  • Publication number: 20190043155
    Abstract: An image signal processing system includes a first processor and a memory. The memory is coupled to the first processor through a first memory interface and a second memory interface. The memory includes a first memory area and a second memory area. The first memory area stores image data outputted from the first processor through the first memory interface during an image processing operation of the first processor. The second memory area stores image data outputted from the first processor through the second memory interface.
    Type: Application
    Filed: February 27, 2018
    Publication date: February 7, 2019
    Applicant: SK hynix Inc.
    Inventor: Hyung Seob BAE
  • Publication number: 20180307647
    Abstract: A computing system may be provided. The computing system may include a host device and a plurality of interface devices. The plurality of interface devices may be configured to communicate with the host device through a host bus. Each of the plurality of interface devices may be configured to perform an interfacing operation between the host device and a memory device. The interfacing operation may include a serial interfacing operation and a parallel interfacing operation.
    Type: Application
    Filed: January 12, 2018
    Publication date: October 25, 2018
    Applicant: SK hynix Inc.
    Inventor: Hyung Seob BAE
  • Patent number: 9598705
    Abstract: The present invention provides Thermococcus onnurineus MC02 strain (accession no. KCTC12511BP) having increased hydrogen production ability, wherein the expression of rchA gene of the strain increases. Also, the present invention provides a method for producing the strain belonged to the genus Thermococcus having increased hydrogen production ability comprising, increasing the expression of rchA gene of the strain, and hydrogen production method using the strain.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: March 21, 2017
    Assignee: KOREA INSTITUTE OF OCEAN SCIENCE & TECHNOLOGY
    Inventors: Sung Gyun Kang, Jung Hyun Lee, Hyun Sook Lee, Kae Kyoung Kwon, Tae Wan Kim, Yun Jae Kim, Min Sik Kim, Seong Hyuk Lee, Seung Seob Bae, Ae Ran Choi
  • Publication number: 20160288232
    Abstract: A shell having a cylindrical body, a pair of tube sheets installed to divide the inside of the shell and provided with a plurality tube insertion holes formed therethrough so as to face each other, and a plurality of tubes respectively welded to the tube insertion holes facing each other to connect the tube sheets, and further including a plurality of tube joint members having the same diameter as that of the tubes and respectively inserted into the tube insertion holes of the tube sheets, and a plurality of ring wires manufactured by cutting a welding wire having a long length into pieces having a designated length and bending the pieces into a ring shape and inserted into the outer circumferences of both ends of the tubes, wherein ring-shaped tube sheet grooves spaced from the tube insertion holes by a designated distance in the outer circumferential surface are formed on each of facing surfaces of the tube sheets so as to form joint parts, both ends of the tubes are inserted into the tube insertion holes o
    Type: Application
    Filed: March 28, 2016
    Publication date: October 6, 2016
    Inventors: Yong Hyun Yoo, Kang Jun Lee, Shin Ghu Park, Jeong Cheol Ju, Young Sik Ji, Deung Seob Bae
  • Patent number: 9460986
    Abstract: A method of manufacturing a semiconductor package substrate has a simplified process and an upper and lower pattern alignment problem is solved. A semiconductor package substrate is manufactured by the method. The method of manufacturing a semiconductor package substrate includes forming a first groove in one surface of a base substrate of a conductive material, filling the first groove with resin, and etching another surface of the base substrate to expose the resin filling the first groove.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: October 4, 2016
    Assignee: HAESUNG DS CO., LTD
    Inventors: Sung Il Kang, In Seob Bae, Min Seok Jin
  • Patent number: 9171789
    Abstract: There is provided a lead frame including a plurality of plating layers formed on both an upper surface and a lower surface of a base material including a metal, wherein an upper outermost plating layer of an upper part of the lead frame is a silver plating layer including silver, and a lower outermost plating layer of a lower part of the lead frame is a gold plating layer including gold.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: October 27, 2015
    Assignee: HAESUNG DS CO., LTD
    Inventors: Dong-Il Shin, In-Seob Bae, Se-Chuel Park
  • Publication number: 20150194323
    Abstract: A method of manufacturing a semiconductor package substrate has a simplified process and an upper and lower pattern alignment problem is solved. A semiconductor package substrate is manufactured by the method. The method of manufacturing a semiconductor package substrate includes forming a first groove in one surface of a base substrate of a conductive material, filling the first groove with resin, and etching another surface of the base substrate to expose the resin filling the first groove.
    Type: Application
    Filed: January 5, 2015
    Publication date: July 9, 2015
    Applicant: HAESUNG DS CO., LTD
    Inventors: Sung Il KANG, In Seob BAE, Min Seok JIN
  • Publication number: 20150164703
    Abstract: The present invention relates to an excreta detecting sensor for detecting excrement/urine from people who are unable to control their own urination, such as elderly individuals, disabled individuals, patients and infants, and relates to an excreta detecting apparatus which automatically notifies a carer of the urination. The excreta detecting sensor according to the present invention includes a conductive fiber having elasticity and absorbent polymer having the characteristic of expanding upon absorbing moisture such as moisture absorbent used in diaper. The excreta detecting apparatus according to the present invention wirelessly notifies the user of the excreta detection information resulting from the defecation or the urination from diaper in which the excreta detecting sensor is mounted.
    Type: Application
    Filed: June 17, 2013
    Publication date: June 18, 2015
    Inventor: Yun Seob Bae
  • Publication number: 20150132819
    Abstract: The present invention provides Thermococcus onnurineus MC02 strain (accession no. KCTC12511BP) having increased hydrogen production ability, wherein the expression of rchA gene of the strain increases. Also, the present invention provides a method for producing the strain belonged to the genus Thermococcus having increased hydrogen production ability comprising, increasing the expression of rchA gene of the strain, and hydrogen production method using the strain.
    Type: Application
    Filed: September 8, 2014
    Publication date: May 14, 2015
    Inventors: Sung Gyun KANG, Jung Hyun LEE, Hyun Sook LEE, Kae Kyoung KWON, Tae Wan KIM, Yun Jae KIM, Min Sik KIM, Seong Hyuk LEE, Seung Seob BAE, Ae Ran CHOI
  • Publication number: 20140252580
    Abstract: There is provided a lead frame including a plurality of plating layers formed on both an upper surface and a lower surface of a base material including a metal, wherein an upper outermost plating layer of an upper part of the lead frame is a silver plating layer including silver, and a lower outermost plating layer of a lower part of the lead frame is a gold plating layer including gold.
    Type: Application
    Filed: August 5, 2013
    Publication date: September 11, 2014
    Applicant: SAMSUNG TECHWIN CO., LTD.
    Inventors: Dong-Il SHIN, In-Seob BAE, Se-Chuel PARK
  • Patent number: 8257953
    Abstract: The present invention relates to a hyperthermophilic DNA polymerase and a preparation method thereof. The invention provides a novel hyperthermophilic DNA polymerase isolated from a Thermococcus sp. strain, a functional equivalent thereof, a protein having the amino acid sequence thereof, and a preparation method thereof. The DNA polymerase according to the invention is a DNA polymerase, which is hyperthermophilic and has an elongation ability and fidelity higher than those of prior commercial DNA polymerases. Thus, the DNA polymerase according to the invention will be useful in precision analysis, precision diagnosis, identification and the like, which require accurate PCR.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: September 4, 2012
    Assignee: Korean Ocean Research & Development Institute
    Inventors: Jung Hyun Lee, Suk Tae Kwon, Sung Gyun Kang, Sang Jin Kim, Jung Ho Hyun, Kae Kyoung Kwon, Yun Jae Kim, Hyun Sook Lee, Seung Seob Bae, Ki Hoon Nam, Jae Kyu Lim, Jung Ho Jeon, Sung Hyun Yang