Patents by Inventor In Soo Suh

In Soo Suh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7948011
    Abstract: A novel enhancement mode field effect transistor (FET), such as a High Electron Mobility Transistors (HEMT), has an N-polar surface uses polarization fields to reduce the electron population under the gate in the N-polar orientation, has improved dispersion suppression, and low gate leakage.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: May 24, 2011
    Assignee: The Regents of the University of California
    Inventors: Siddharth Rajan, Chang Soo Suh, James S. Speck, Umesh K. Mishra
  • Patent number: 7939391
    Abstract: III-nitride devices are described with recessed gates. In some embodiments, the material around the gates is formed by epitaxially depositing different III-nitride layers on a substrate and etching through at least the top two layers in the gate region. Because adjacent layers in the top three layers of the structure have different compositions, some of the layers act as etch stops to allow for precision etching. In some embodiments, a regrowth mask is used to prevent growth of material in the gate region. A gate electrode is deposited in the recess.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: May 10, 2011
    Assignee: Transphorm Inc.
    Inventors: Chang Soo Suh, Ilan Ben-Yaacov
  • Patent number: 7940373
    Abstract: Provided are a compensating mask, a multi-optical system using the compensating mask, and a method of compensating for a 3-dimensional (3-D) mask effect using the compensating mask. Methods of compensating for a 3-D mask effect using a compensating mask may include generating a first kernel corresponding to a normal mask used for forming a minute pattern, generating a second kernel corresponding to a compensating mask, mixing the first kernel corresponding to the normal mask with the second kernel corresponding to the compensating mask, and generating a multi-optical system kernel corresponding to mixing the first kernel and the second kernel.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: May 10, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-soo Suh, Suk-joo Lee, Han-ku Cho, Yong-jin Chun, Sung-woo Lee, Young-chang Kim
  • Patent number: 7915643
    Abstract: Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is applied at the gate. Both gallium face and nitride face devices formed as enhancement mode devices.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: March 29, 2011
    Assignee: Transphorm Inc.
    Inventors: Chang Soo Suh, Umesh Mishra
  • Publication number: 20110071040
    Abstract: The present invention provides variable mass labeling reagents, a set of the variable mass labeling reagents, and a multiplexed set of variable mass labeling reagents.
    Type: Application
    Filed: July 10, 2009
    Publication date: March 24, 2011
    Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Seung Koo Shin, Jongcheol Seo, Min-Soo Suh, Hye-Joo Yoon
  • Patent number: 7903321
    Abstract: Provided are a color electrophoretic display and a method of manufacturing the same. The color electrophoretic display includes: a plurality of lower electrodes arranged on a lower layer and disposed with a predetermined interval therebetween; a plurality of first to third photoresist chambers arranged on the plurality of lower electrodes; first to third electronic inks accommodated in the plurality of first to third photoresist chambers respectively, and discriminatively operating to an electric field to independently display red, green, and blue colors; and a plurality of upper electrodes disposed with a predetermined interval therebetween and facing the plurality of lower electrodes with the plurality of first to third photoresist chambers being held therebetween.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: March 8, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Deok Ahn, Seung Youl Kang, Chul Am Kim, In Kyu You, Gi Heon Kim, Ji Young Oh, Kyu Ha Baek, Kyung Soo Suh
  • Patent number: 7900170
    Abstract: An optical proximity correction (OPC) system and methods thereof are provided. The example OPC system may include an integrated circuit (IC) layout generation unit generating an IC layout, a database unit storing a first plurality of OPC models, each of the first plurality of OPC models associated with one of a plurality of target specific characteristics and a mask layout generation unit including a model selector selecting a second plurality of OPC models based on a comparison between the target specific characteristics associated with the plurality of OPC models and the generated IC layout, the mask layout generation unit generating a mask layout based on the IC layout and the selected second plurality of OPC models.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Soo Suh, Young-Seog Kang, Han-Ku Cho, Sang-Gyun Woo
  • Patent number: 7889419
    Abstract: An electrophoretic display and a method of manufacturing the electrophoretic display are provided. The electrophoretic display includes an lower electrode formed on an under layer, an lower electrode protection layer formed on the lower electrode, an insulating template formed on the lower electrode protection layer and having a plurality of holes of smaller size than the wavelength of visible rays region, a dielectric fluid filling the holes and having a color, a plurality of charged particles suspended in the dielectric fluid filling each of the plurality of holes having a color different from the color of the dielectric fluid, and an upper electrode formed on the insulating template in sequential order. Accordingly, a problem of agglomeration of the charged particles can be solved by the insulating template having holes of smaller size than the wavelength of visible rays region, and thus a reliable electrophoretic display emitting light of one color or natural colors is achieved.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: February 15, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Deok Ahn, Kyung Soo Suh, Seung Youl Kang, Yong Eui Lee, Chul Am Kim, Meyoung Ju Joung, Mi Kyung Kim, Gun Hong Lee
  • Publication number: 20110033971
    Abstract: An organic inverter and a method of manufacturing the same are provided, which regulates threshold voltages depending on positions when an inverter circuit is manufactured on a substrate using an organic semiconductor. To form a depletion load transistor and an enhancement driver transistor at adjacent positions of the same substrate, the surface of the substrate is selectively treated by positions or selectively applied by self-assembly monolayer treatment. Thus, a D-inverter having a combination of a depletion mode and an enhancement mode is more easily realized than a conventional method using a transistor size effect. Also, the D-inverter can be realized even with the same W/L ratio, thereby increasing integration density. That is, the W/L ratio does not need to be increased to manufacture a depletion load transistor, thereby improving integration density.
    Type: Application
    Filed: October 18, 2010
    Publication date: February 10, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon KOO, Kyung Soo SUH, Seong Hyun KIM
  • Patent number: 7867811
    Abstract: Provided is a display panel comprised of a white color organic luminescent element and a color filter for full color implementation, wherein a substrate in which an organic luminescent element is formed and a color filter are assembled and fixed to face each other with an adhesive pattern therebetween, and liquid oil is filled between the color filter and the substrate inside of the adhesive pattern so as to block external moisture or oxygen, so that deterioration of luminous characteristics due to the external moisture or oxygen may be prevented by encapsulating the organic luminescent element and the color filter with the liquid oil, which leads to enhance reliability and stability of the element, and also allows the encapsulation process to be performed with relatively simple steps and low cost.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: January 11, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gi Heon Kim, Sung Min Yoon, In Kyu You, Kyu Ha Baek, Kyung Soo Suh
  • Patent number: 7851825
    Abstract: Enhancement-mode III-nitride transistors are described that have a large source to drain barrier in the off state, low off state leakage, and low channel resistance in the access regions are described. The devices can include a charge depleting layer under the gate and/or a charge enhancing layer outside of the gate region, that is, in the access region.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: December 14, 2010
    Assignee: Transphorm Inc.
    Inventors: Chang Soo Suh, Ilan Ben-Yaacov, Robert Coffie, Umesh Mishra
  • Publication number: 20100300360
    Abstract: Provided is a method for depositing an organic/inorganic thin film. The method includes: i) heating a source vessel containing an organic material and an inorganic material; ii) transferring a deposition gas to a process chamber; iii) distributing the deposition gas onto a substrate disposed in the process chamber; iv) purging the process chamber; v) heating an activating agent source vessel; vi) transferring a heat initiator gas phase to the process chamber; vii) distributing the heat initiator gas phase onto the organic or inorganic material monomer deposited on the substrate through the process chamber, and forming an organic/inorganic thin film; and viii) exhausting the heat initiator gas phase and purging the process chamber. Depositing the organic/inorganic thin film in a time-division manner, the thickness of the thin film can be accurately adjusted and the deposition can be uniformly performed when the thin film is deposited on a large-scale substrate.
    Type: Application
    Filed: August 13, 2010
    Publication date: December 2, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seong Deok AHN, Seung Youl KANG, Chul Am KIM, Ji Young OH, In Kyu YOU, Gi Heon KIM, Kyu Ha BAEK, Kyung Soo SUH
  • Patent number: 7842952
    Abstract: An organic inverter and a method of manufacturing the same are provided, which regulates threshold voltages depending on positions when an inverter circuit is manufactured on a substrate using an organic semiconductor. To form a depletion load transistor and an enhancement driver transistor at adjacent positions of the same substrate, the surface of the substrate is selectively treated by positions or selectively applied by self-assembly monolayer treatment. Thus, a D-inverter having a combination of a depletion mode and an enhancement mode is more easily realized than a conventional method using a transistor size effect. Also, the D-inverter can be realized even with the same W/L ratio, thereby increasing integration density. That is, the W/L ratio does not need to be increased to manufacture a depletion load transistor, thereby improving integration density.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 30, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Kyung Soo Suh, Seong Hyun Kim
  • Publication number: 20100264461
    Abstract: A novel enhancement mode field effect transistor (FET), such as a High Electron Mobility Transistors (HEMT), has an N-polar surface uses polarization fields to reduce the electron population under the gate in the N-polar orientation, has improved dispersion suppression, and low gate leakage.
    Type: Application
    Filed: September 18, 2006
    Publication date: October 21, 2010
    Inventors: Siddharth Rajan, Chang Soo Suh, James S. Speck, Umesh K. Mishra
  • Publication number: 20100255646
    Abstract: III-nitride devices are described with recessed gates. In some embodiments, the material around the gates is formed by epitaxially depositing different III-nitride layers on a substrate and etching through at least the top two layers in the gate region. Because adjacent layers in the top three layers of the structure have different compositions, some of the layers act as etch stops to allow for precision etching. In some embodiments, a regrowth mask is used to prevent growth of material in the gate region. A gate electrode is deposited in the recess.
    Type: Application
    Filed: June 16, 2010
    Publication date: October 7, 2010
    Applicant: Transphorm Inc.
    Inventors: Chang Soo Suh, Ilan Ben-Yaacov
  • Patent number: 7799377
    Abstract: Provided is a method for depositing an organic/inorganic thin film. The method includes: i) heating a source vessel containing an organic material and an inorganic material; ii) transferring a deposition gas to a process chamber; iii) distributing the deposition gas onto a substrate disposed in the process chamber; iv) purging the process chamber; v) heating an activating agent source vessel; vi) transferring a heat initiator gas phase to the process chamber; vii) distributing the heat initiator gas phase onto the organic or inorganic material monomer deposited on the substrate through the process chamber, and forming an organic/inorganic thin film; and viii) exhausting the heat initiator gas phase and purging the process chamber. Depositing the organic/inorganic thin film in a time-division manner, the thickness of the thin film can be accurately adjusted and the deposition can be uniformly performed when the thin film is deposited on a large-scale substrate.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: September 21, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Deok Ahn, Seung Youl Kang, Chul Am Kim, Ji Young Oh, In Kyu You, Gi Heon Kim, Kyu Ha Baek, Kyung Soo Suh
  • Patent number: 7795642
    Abstract: III-nitride devices are described with recessed gates. In some embodiments, the material around the gates is formed by epitaxially depositing different III-nitride layers on a substrate and etching through at least the top two layers in the gate region. Because adjacent layers in the top three layers of the structure have different compositions, some of the layers act as etch stops to allow for precision etching. In some embodiments, a regrowth mask is used to prevent growth of material in the gate region. A gate electrode is deposited in the recess.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: September 14, 2010
    Assignee: Transphorm, Inc.
    Inventors: Chang Soo Suh, Ilan Ben-Yaacov
  • Publication number: 20100225994
    Abstract: Provided is a microcapsule patterning method for patterning electrophoretic microcapsules on a substrate, the method including the steps of: preparing a microcapsule slurry in which microcapsules and a water-soluble binder are mixed; putting the microcapsule slurry into a liquid ejector having injection and ejection ports formed therein; and applying the microcapsule slurry contained in the liquid ejector onto the substrate so as to pattern pixels using the microcapsules. Accordingly, specific patterns are formed without physical and chemical damage to the microcapsules. Therefore, the patterns can be used as pixels of flat panel displays.
    Type: Application
    Filed: September 18, 2007
    Publication date: September 9, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Chul Am Kim, Seung Youl Kang, Hey Jin Myoung, Kyung Soo Suh, Seong Daok Ahn, Gi Heon Kim, In Kyu You, Ji Young Oh
  • Patent number: 7786010
    Abstract: An apparatus and a method form a thin layer on each of multiple semiconductor substrates. A processing chamber of the apparatus includes a boat in which the semiconductor substrates are arranged in a vertical direction. A vaporizer vaporizes a liquid metal precursor into a metal precursor gas. A buffer receives a source gas from the vaporizer and increases a pressure of the source gas to higher than atmospheric pressure, the source gas including the metal precursor gas. A first supply pipe connects the buffer and the processing chamber, the first supply pipe including a first valve for controlling a mass flow rate of the source gas. A second supply pipe connects the vaporizer and a pump for creating a vacuum inside the processing chamber, the second supply pipe including a second valve for exhausting a dummy gas during an idling operation of the vaporizer.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: August 31, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Wook Lee, Wan-Goo Hwang, Bu-Cheul Lee, Jeong-Soo Suh, Sung-Il Han, Seong-Ju Choi
  • Publication number: 20100141411
    Abstract: Provided are a touch screen and a method of operating the same. The touch screen includes a detecting part, a control part, and a tactile feedback part. The detecting part detects object's approach or contact. The control part receives a signal of the detecting part to output a feedback signal. The tactile feedback part receives the feedback signal of the control part to provide a tactile feedback to a contact position using a magnetic force. The tactile feedback uses the magnetic force of a magnetic dipole.
    Type: Application
    Filed: August 3, 2009
    Publication date: June 10, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seongdeok AHN, In-Kyu You, Jiyoung Oh, Chul Am Kim, Jae bon Koo, Sang Seok Lee, Kyung Soo Suh, Kyoung Ik Cho