Patents by Inventor Irwin Yablok

Irwin Yablok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6908027
    Abstract: More complete bonding of wafers may be achieved out to the edge regions of the wafer by constrained bond strengthening of the wafers in a pressure bonding apparatus after direct wafer bonding. The pressure bonding process may be accompanied by the application of not above room temperature.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: June 21, 2005
    Assignee: Intel Corporation
    Inventors: Peter Tolchinsky, Mohamad Shaheen, Ryan Lei, Irwin Yablok
  • Publication number: 20050070048
    Abstract: Embodiments of the present invention propose a bulk heat dissipation substrate that is part of the substrate on which the devices of an integrated circuit are formed. The bulk layer is formed directly under the device layer of a semiconductor substrate and has a thermal conductivity greater than that of the semiconductor substrate. It is a simple passive technique for the removal of heat during device operation. It is also very effective at the removal of heat from hot spots, or areas of excessive heat, because the heat dissipation material is in direct contact with the substrate on which the devices are formed. Such a material is also valuable for the dissipation of heat during the processing of the wafer substrate because it can be coupled to the semiconductor wafer before processing.
    Type: Application
    Filed: September 25, 2003
    Publication date: March 31, 2005
    Inventors: Peter Tolchinsky, Mohamad Shaheen, Irwin Yablok
  • Publication number: 20050059221
    Abstract: Embodiments of the invention use silicon on porous silicon wafers to produce a reduced-thickness IC device wafers. After device manufacturing, a temporary support is bonded to the device layer. The uppermost silicon layer is then separated from the silicon substrate by splitting the porous silicon layer. The porous silicon layer and temporary support are then removed and packaging is completed. Embodiments of the invention provide reliable, low cost methods and apparatuses for producing reduced-thickness IC device wafers to substantially increase thermal conductivity between the device layer of an IC device and a heat sink. In alternative embodiments, the layered silicon substrate includes an insulator layer on a layer of porous silicon and a silicon layer on the insulator layer.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 17, 2005
    Inventors: Peter Tolchinsky, Irwin Yablok, Chuan Hu, Richard Emery
  • Publication number: 20040251480
    Abstract: A method and apparatus for a semiconductor device having increased electrical carrier mobility is described. That method and apparatus comprises forming two recesses within a substrate, and providing a material within the two recesses. The material has a predetermined coefficient of thermal expansion (CTE) to facilitate introduction of a predetermined strain within the substrate in a location between the two recesses. Also described is a semiconductor device that comprises a substrate having two recesses formed therein, and a material disposed within the two recesses. The material has a predetermined coefficient of thermal expansion (CTE) to facilitate introduction of a predetermined strain within the substrate in a location between the two recesses.
    Type: Application
    Filed: June 16, 2003
    Publication date: December 16, 2004
    Inventors: Peter G. Tolchinsky, Irwin Yablok
  • Publication number: 20040188501
    Abstract: More complete bonding of wafers may be achieved out to the edge regions of the wafer by constrained bond strengthening of the wafers in a pressure bonding apparatus after direct wafer bonding. The pressure bonding process may be accompanied by the application of not above room temperature.
    Type: Application
    Filed: March 31, 2003
    Publication date: September 30, 2004
    Inventors: Peter Tolchinsky, Mohamad Shaheen, Ryan Lei, Irwin Yablok
  • Publication number: 20040014302
    Abstract: A method is provided for fabricating an SOI water. This may involve forming a silicon substrate and implanting oxygen into the substrate. Damaged portions of the implanted silicon may be healed/cured by CMP or anneal, for example. An epi layer may then be deposited over the healed/cured regions of the substrate. The substrate may then be annealed to form an insulative layer. The wafer may be thinned to provide the proper thickness of the epi layer.
    Type: Application
    Filed: July 22, 2002
    Publication date: January 22, 2004
    Inventors: Peter G. Tolchinsky, Irwin Yablok, Mohamad A. Shaheen