Abstract: A feedback loop is used to optimize a zero current threshold for a switching regulator. After the low side power switch of the switching regulator turns off, the switching node state is monitored to adjust the zero current threshold in a real time and thus the low-side power switch is prevented from turning off too early or too late. Thereby the efficiency in green mode is optimized.

Abstract: A parameter setting circuit and method for an integrated circuit apply a pulse current to a pin of the integrated circuit during a programming mode of the integrated circuit, and then extract the difference between the voltage on the pin and the DC component of the voltage on the pin to determine a setting signal for parameter setting to an internal circuit of the integrated circuit. By this way, an input pin, an output pin or an input/output pin of the integrated circuit may be used as the pin implementing the parameter setting function.

Abstract: A multi-channel regulator system includes serially connected PWM integrated circuits, each of which determines a PWM signal for a respective channel to operate therewith, and individually controls its operation mode according to whether or not an external clock is detected. Therefore, each channel will not be limited to operate under a constant mode and could become a master channel or a slave channel. Additionally, each of the PWM integrated circuits generates a phase shifted synchronous clock for its next channel during it is enabled, and thus all the channels operate in a synchronous but phase interleaving manner.

Abstract: For a system to avoid abnormal operation caused by a shorted parameter setting pin of an integrated circuit, a protection apparatus and method apply a buffered reference voltage to the parameter setting pin to define an internal parameter of the integrated circuit by the buffered reference voltage and an external element connected to the parameter setting pin, and detect the rapid variation of the internal parameter to trigger a shutdown signal or slow down the speed of the variation of the internal parameter reflected to an adjustable signal of the integrated circuit.

Abstract: A frequency setting circuit and method for an integrated circuit detect the voltage at a pin of the integrated circuit during a frequency setting period, and determine a frequency setting signal according to the detected voltage to set the frequency of a clock provided by an oscillator in the integrated circuit. After setting the frequency, the frequency setting circuit and method store the frequency setting signal and stop detecting the voltage at the pin. Thus the pin can be used for other functions.

Abstract: A circuit structure of an ultra high voltage level shifter includes a low voltage substrate having the electronic elements of the ultra high voltage level shifter thereon, an ultra high voltage redistribution layer, and a passivation layer between the substrate and the redistribution layer to prevent dielectric breakdown between the redistribution layer and the substrate.

Abstract: The present invention discloses a multi-chip module with master-slave analog signal transmission function. The multi-chip module comprises: a master chip having a first setting input pin for receiving an analog setting signal to generate an analog setting in the master chip, and the master chip duplicating the analog setting to output a first analog output; and a first slave chip for receiving the first analog output from the master chip to generate an internal setting of the first slave chip.

Abstract: An adjustable driver voltage source for a switching power supply uses a linear regulator to provide a driver voltage, and a modulator to adjust the driver voltage according to the loading change of the switching power supply. The modulator may lower the driver voltage at light load to reduce the switching loss and thereby increase the power efficiency of the switching power supply.

Abstract: A mix mode wide range multiplier and method are provided for multiplying a first signal by a second signal to generate an output signal. A reference signal is generated according to a first gain and a reference value, the output signal is generated according to a second gain and the first signal, a target value is generated according to the second signal, the first gain is adjusted to make the reference signal equal to the target value, and the second gain is adjusted to maintain a ratio of the second gain to the first gain.

Abstract: A mix mode wide range divider is provided for dividing a first signal by a second signal to generate an output signal. A third signal is generated depending on the resistance of a first adjustable resistor, and a fourth signal is generated according to the third signal and a target value determined by the second signal, to adjust the resistance of the first adjustable resistor and the resistance of a second adjustable resistor. The resistance of the first adjustable resistor is so adjusted to make the third signal equal to the target value, and the resistance of the second adjustable resistor is so adjusted to maintain a ratio of the resistance of the second adjustable resistor to the resistance of the first adjustable resistor. The output signal is generated depending on the first signal and the resistance of the second adjustable resistor.

Abstract: An apparatus for interleaved phase shift clock synchronization includes a master clock generator and at least one slave clock generator. The master clock generator provides a ramp signal or reset signal for each slave clock generator to generate a clock synchronized with the clock of the master clock generator, and the master and slave clock generators have different reference voltages for generating clocks. Therefore, the clocks generated will be synchronized and interleaved phase with each other.

Abstract: A fixed-frequency control circuit and method detect the difference between the frequency of a pulse width modulation signal and a target frequency to adjust a current used to determine the on-time or off-time of the pulse width modulation signal, such that the frequency of the pulse width modulation signal is stable at the target frequency.

Abstract: A non-constant frequency voltage regulator includes a constant-time trigger to generate a pulse width modulation signal, a current generator to provide a first current to set a constant on-time or a constant off-time for the pulse width modulation signal, and a frequency control circuit to detect the pulse width of a phase node voltage, compare the pulse width with the constant on-time or the constant off-time set by the first current to generate a second current, and add the second current to the first current to supply to the constant-time trigger to control the frequency of the pulse width modulation signal.

Abstract: A non-constant frequency voltage regulator includes a constant-time trigger to trigger a constant on-time or a constant off-time for a pulse width modulation signal, a current generator to provide a first current to determine the constant on-time or the constant off-time, a power output stage operated by the pulse width modulation signal to produce a load current, and a frequency control circuit for loading feed forward by a second current added to the first current to adjust the constant on-time or the constant off-time for frequency compensation to the pulse width modulation signal.

Abstract: A voltage source provides a first voltage which is independent of temperature variation and variable, and a voltage step-down circuit provides a second voltage to be subtracted from the first voltage to generate a reference signal. The second voltage has a first temperature coefficient, and the reference signal has a second temperature coefficient. By changing the first voltage, the second temperature coefficient changes accordingly.

Abstract: The present invention discloses an average current regulator, a driver circuit of an average current regulator, and a method for regulating an average current. The average current regulator includes: a power stage including at least one power transistor which switches according to a pulse width modulation (PWM) signal to convert an input voltage to an output current; a feedback circuit coupled to the power stage, for generating a feedback signal; an ON-time controller coupled to the feedback circuit, for receiving the feedback signal and generating an ON-time signal according to the feedback signal and an average reference signal relating to a target average current; and a PWM controller, for generating the PWM signal according to the ON-time signal to regulate the average of the output current to the target average current.

Abstract: A soft-start circuit for a switching regulator includes a signal generator and a scaling circuit coupled to the signal generator. During soft-start, the signal generator provides a ramp signal for the switching regulator such that the output voltage of the switching regulator changes from a residual voltage toward a target level. When soft-start is triggered, the scaling circuit provides a scaling voltage depending on the residual voltage, to shift the level of the ramp signal and consequently shorten the soft-start time of the switching regulator.

Abstract: An overstress protection apparatus includes a switch detector. The switch is arranged in a grounding path of a load system. The detector detects the current, voltage or temperature of the load system to determine a signal for controlling the switch, to thereby protect the load system working in normal conditions.

Abstract: A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system.

Abstract: An on-chip mode-setting circuit and method are provided for a chip having an output driver with an output terminal connected to a pin of the chip. The pin may be defined between two states from exterior of the chip. The on-chip mode-setting circuit includes an electronic element connected to a bias input of the output driver for producing a voltage when the pin is defined at one of the two states, and a voltage detector for monitoring the voltage to determine which one of the two states the pin is at, and producing a mode-setting signal accordingly.