Abstract: A control integrated circuit for a power factor correction converter has a pin for detecting an alternating-current information and a direct-current information of an input signal. The control integrated circuit comprises a signal peak detector for detecting a peak value of the input signal to the pin to obtain the direct-current information of the input signal. Since the alternating-current information and the direct-current information of the input signal can be obtained through the same pin, the pin count of the control integrated circuit can be decreased.

Abstract: A control circuit for a power converter includes a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is coupled with an output end of the power converter through a resistor. The driving circuit conducts a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. The signal processing circuit calculates a first difference between the first sampling value and a first reference value, and a second difference between the second sampling value and a second reference value. When the difference between the first difference and the second difference is less than a predetermined value, the signal processing circuit may therefore configure the conduction time or frequency of the switch.

Abstract: An adjustable driver voltage source for a switching power supply uses a linear regulator to provide a driver voltage, and a modulator to adjust the driver voltage according to the loading change of the switching power supply. The modulator may lower the driver voltage at light load to reduce the switching loss and thereby increase the power efficiency of the switching power supply.

Abstract: For a system to avoid abnormal operation caused by a shorted parameter setting pin of an integrated circuit, a protection apparatus and method apply a buffered reference voltage to the parameter setting pin to define an internal parameter of the integrated circuit by the buffered reference voltage and an external element connected to the parameter setting pin, and detect the rapid variation of the internal parameter to trigger a shutdown signal or slow down the speed of the variation of the internal parameter reflected to an adjustable signal of the integrated circuit.

Abstract: A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system.

Abstract: An AC-to-DC power converter with a BJT as a power switch can set a base current of the BJT by a current setting resistor which is in the outside of a control integrated circuit. Since an output current and a recovery current of the BJT are injected into a sensing resistor, the AC-to-DC power converter can correctly detect an inductor current thereof from the sensing resistor.

Abstract: A control circuit for a power converter includes a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is coupled with an output end of the power converter through a resistor. The driving circuit conducts a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. The signal processing circuit calculates a first difference between the first sampling value and a first reference value, and a second difference between the second sampling value and a second reference value. When the difference between the first difference and the second difference is less than a predetermined value, the signal processing circuit may therefore configure the conduction time or frequency of the switch.

Abstract: A controller for a power converter is provided. The controller includes a sense current integrating circuit, a reference current integrating circuit and a drive signal generation circuit. The sense current integrating circuit performs an integrating operation to a sense current representative of a conduction current flowing through a power switch of the power converter and thereby outputs a first integrating result. The reference current integrating circuit performs another integrating operation to a reference current and thereby outputs a second integrating result. The drive signal generation circuit determines a switching period of the power switch according to a status of an output voltage of the power converter cooperative with a relative magnitude relationship between the first integrating result and the second integrating circuit. Furthermore, a controlling method for such power converter also is provided.

Abstract: An LED control device for configuring a phase-cut dimming system includes an LED and a switch. The LED control device configures the conduction status of the switch so as to supply power to the LED according to an input signal. The LED control device further detects whether the input signal is phase-cut. When the input signal is phase-cut, the LED control device stores the signal values of the internal circuits. Afterward, when the input signal is not phase-cut, the LED control device restores the stored signal values so that the internal circuits may resume to the previous operation status rapidly.

Abstract: A bleeding circuit and method for an electromagnetic interference filter detect whether or not an AC power source connected to the electromagnetic interference filter is removed, establish a discharge path for discharging a capacitor of the electromagnetic interference filter once the connected AC power source is removed, and cut off the discharge path during the AC power source is in connection to the electromagnetic interference filter for decreasing power consumption of the electromagnetic interference filter.

Abstract: A non-constant frequency voltage regulator includes a constant-time trigger to trigger a constant on-time or a constant off-time for a pulse width modulation signal, a current generator to provide a first current to determine the constant on-time or the constant off-time, a power output stage operated by the pulse width modulation signal to produce a load current, and a frequency control circuit for loading feed forward by a second current added to the first current to adjust the constant on-time or the constant off-time for frequency compensation to the pulse width modulation signal.

Abstract: A control circuit for a power converter is disclosed, having a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is used for coupling with an output end of the power converter through a resistor. The driving circuit is used for conducting a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. When the difference between the first sampling value and the second sampling value is less than a predetermined value, the signal processing circuit configures the driving circuit to adjust at least one of the conduction time and the conduction frequency of the switch according to an output signal of the power converter received from the shared pin.

Abstract: A control circuit for a power converter has a current source, a sampling circuit, a signal processing circuit, a driving circuit, and a shared pin. The shared pin is used for coupling with a resistor and a switch. The current source, coupled with the shared pin, provides a current through the shared pin to the resistor in a first period. The sampling circuit, coupled with the shared pin, samples signals on the shared pin for generating a first sampling value and a second sampling value. The signal processing circuit, coupled with the sampling circuit, compares the first sampling value and the second sampling value. The driving circuit generates driving signals for conducting the switch. When the difference of the first sampling value and the second sampling value is less than a predetermined value, the signal processing circuit configures the driving circuit to intermittently conduct the switch in a second period.

Abstract: A floating gate driver includes a level shifter to transmit a set signal and a reset signal to a first output terminal and a second output terminal, respectively. The level shifter includes a first high-voltage transistor, a first current limiter and a first input transistor connected in series between the first output terminal and a ground terminal, and a second high-voltage transistor, a second current limiter and a second input transistor connected in series between the second output terminal and the ground terminal, and the first and second high-voltage transistors are remained on. With this arrangement, the level shifter can transmit signals from low side to high side under better safe operating area and has better noise immunity.

Abstract: The present invention discloses a control circuit of a switching regulator wherein a confirmation signal is generated to confirm that an upper gate switch has been turned off, to avoid shoot-through. The confirmation signal is generated by obtaining an upper gate sampling signal from a transistor in a level shift circuit which receives a resetting signal for turning off the upper gate switch.

Abstract: A multi-channel regulator system includes serially connected PWM integrated circuits, each of which determines a PWM signal for a respective channel to operate therewith, and individually controls its operation mode according to whether or not an external clock is detected. Therefore, each channel will not be limited to operate under a constant mode and could become a master channel or a slave channel. Additionally, each of the PWM integrated circuits generates a phase shifted synchronous clock for its next channel during it is enabled, and thus all the channels operate in a synchronous but phase interleaving manner.

Abstract: A first switch is switched to short a multi-functional pin of an integrated circuit to a ground terminal or let a current supplied to the multi-functional pin to flow to a second switch connected to the multi-functional pin. Before the integrated circuit is ready, the second switch is closed circuit and is detected its current to determine a first signal to enable or disable the integrated circuit. After the integrated circuit is ready, the second switch is open circuit, the voltage at the multi-functional pin is detected to determine a second signal to enable or disable the integrated circuit, and when the voltage at the multi-functional pin is higher than a threshold, a power good signal is triggered.

Abstract: The present invention discloses a power regulator with over current protection (OCP), a control circuit thereof, and a method of over current protection. The power regulator with OCP includes: a primary circuit, a transformer, and a secondary circuit. The power regulator receives AC power, and generates secondary current which is supplied to a load circuit. The primary circuit includes a control circuit which includes: a switch control circuit, a first comparator circuit, a sample and hold circuit, and a compensation circuit which is coupled to the sample and hold circuit. The compensation circuit adaptively adjusts a threshold level of the OCP according to a current sense signal, or controls a delay time of an over current detection signal to compensate an error of the OCP threshold level, which is caused by the AC power, such that the primary current may have a peak corresponding to a predetermined setting.

Abstract: The present invention discloses an average current regulator, a driver circuit of an average current regulator, and a method for regulating an average current. The average current regulator includes: a power stage including at least one power transistor which switches according to a pulse width modulation (PWM) signal to convert an input voltage to an output current; a feedback circuit coupled to the power stage, for generating a feedback signal; an ON-time controller coupled to the feedback circuit, for receiving the feedback signal and generating an ON-time signal according to the feedback signal and an average reference signal relating to a target average current; and a PWM controller, for generating the PWM signal according to the ON-time signal to regulate the average of the output current to the target average current.

Abstract: A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system.