Patents by Inventor Isabelle Ferain

Isabelle Ferain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stress memorization techniques for transistor devices
    Patent number: 9231079
    Abstract: One illustrative method disclosed herein includes, among other things, performing a source/drain extension ion implantation to form a doped extension implant region in the source/drain regions of the device, performing an ion implantation process on the source/drain regions with a Group VII material (e.g., fluorine), after performing the Group VII material ion implantation process, forming a capping material layer above the source/drain regions, and, with the capping material layer in position, performing an anneal process so as to form stacking faults in the source/drain regions.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: January 5, 2016
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Johannes M. van Meer, Cuiqin Xu, Isabelle Ferain
  • STRESS MEMORIZATION TECHNIQUES FOR TRANSISTOR DEVICES
    Publication number: 20150364570
    Abstract: One illustrative method disclosed herein includes, among other things, performing a source/drain extension ion implantation to form a doped extension implant region in the source/drain regions of the device, performing an ion implantation process on the source/drain regions with a Group VII material (e.g., fluorine), after performing the Group VII material ion implantation process, forming a capping material layer above the source/drain regions, and, with the capping material layer in position, performing an anneal process so as to form stacking faults in the source/drain regions.
    Type: Application
    Filed: June 13, 2014
    Publication date: December 17, 2015
    Inventors: Johannes M. van Meer, Cuiqin Xu, Isabelle Ferain