Patents by Inventor Isamu Kobori

Isamu Kobori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5821560
    Abstract: A thin film transistor which includes an insulation base, first and second gate electrodes, first and second insulation layers, an active layer of semiconductor material, a source electrode and a drain electrode, in which a lateral length of the first gate electrode is narrower than a lateral length of the second gate electrode. Also, the first gate is electrically insulated from the active layer of semiconductor material by the first insulation layer so that the drain current saturates in a high drain voltage region.
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: October 13, 1998
    Assignees: TKD Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Michio Arai, Kazushi Sugiura, Ichiro Takayama, Yukio Yamauchi, Isamu Kobori, Mitsufumi Codama, Naoya Sakamoto
  • Patent number: 5767529
    Abstract: A thin-film transistor comprising an active silicon pattern which is formed of a plurality of island-like regions arranged in parallel to each other, the island-like regions being formed of a polycrystal silicon thin film and each having a plane area of 1000 .mu.m.sup.2 or less.
    Type: Grant
    Filed: March 28, 1996
    Date of Patent: June 16, 1998
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Isamu Kobori, Michio Arai
  • Patent number: 5743967
    Abstract: There is disclosed a low-pressure CVD process which uses active gases and which provides improved uniformity of the film thickness distribution across the substrate while maintaining high throughput. At least two substrates are stacked at a given spacing inside a reaction vessel. Films are to be formed over the substrates. Annular corrective frames are mounted between the successive substrates and opposite to peripheral portions of the substrates.
    Type: Grant
    Filed: July 11, 1996
    Date of Patent: April 28, 1998
    Assignees: Semiconductor Energy Laboratory Co., TDK Corporation
    Inventors: Isamu Kobori, Michio Arai
  • Patent number: 5591988
    Abstract: A substrate (1) has a surface covered with an insulation layer (2), on which an active layer (3') made of non-single crystal silicon through thin film technique is provided. A gate electrode layer (5') is partially provided on said active layer through a gate insulation layer (4). Said active layer (3') is subject to injection of P-type or N-type impurities to provide an image sensor of MOS structure. Bias potential is applied to a gate electrode so that a circuit between a source and a drain is in an On state, so that input light through said substrate or said gate electrode is applied to said active layer, and electrical output depending upon said input light is obtained from said source electrode or said drain electrode. Other MOS transistors for switching element and/or shift registers for operating said image sensor are provided on said substrate (1).
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 7, 1997
    Assignees: TDK Corporation, Semiconductor Energy Lab. Co. Ltd.
    Inventors: Michio Arai, Takashi Inushima, Mitsufumi Codama, Kazushi Sugiura, Ichiro Takayama, Isamu Kobori, Yukio Yamauchi, Naoya Sakamoto
  • Patent number: 5574293
    Abstract: A substrate (1) has a surface covered with an insulation layer (2), on which an active layer (3') made of non-single crystal silicon through thin film technique is provided. A gate electrode layer (5') is partially provided on said active layer through a gate insulation layer (4'). Said active layer (3') is subject to injection of P-type or N-type impurities to provide an image sensor of MOS structure. Bias potential is applied to a gate electrode so that a circuit between a source and a drain is in an On state, so that input light through said substrate or said gate electrode is applied to said active layer, and electrical output depending upon said input light is obtained from said source electrode or said drain electrode. Other MOS transistors for switching element and/or shift registers for operating said image sensor are provided on said substrate (1).
    Type: Grant
    Filed: November 22, 1994
    Date of Patent: November 12, 1996
    Assignees: TDK Corp., Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Michio Arai, Takashi Inushima, Mitsufumi Codama, Kazushi Sugiura, Ichiro Takayama, Isamu Kobori, Yukio Yamauchi, Naoya Sakamoto
  • Patent number: 5565691
    Abstract: In a thin film semiconductor device having a substrate (1), an active layer (3, 6, 9), a gate insulation layer (4), and a gate electrode (5), the active layer is produced through the steps of producing an amorphous silicon layer on said substrate through a CVD process by using polysilane Si.sub.n H.sub.2(n+1), n is an integer, with added chlorine gas, and effecting solid phase growth on to said amorphous silicon layer. The addition of chlorine in producing the amorphous silicon layer makes it possible to produce the amorphous silicon layer at a lower temperature and at a rapid growth rate. A thin film semiconductor device thus produced has the advantages of high mobility and low threshold voltage.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: October 15, 1996
    Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Michio Arai, Isamu Kobori