Abstract: In aspects of the invention, each three-level inverter unit has an output current detector. The output from each detector is given to connection wires via a resistor, the connection wires connecting the inverter units. The voltage across the resistor is detected and the deviation, or increment, of the current value of the unit concerned from the average value is determined. The rising up edge of the ON pulses for the IGBT to be controlled is delayed, corresponding to the magnitude of the deviation. Thus, the output current is balanced between the inverter units.

Abstract: In aspects of the invention, each three-level inverter unit has an output current detector. The output from each detector is given to connection wires via a resistor, the connection wires connecting the inverter units. The voltage across the resistor is detected and the deviation, or increment, of the current value of the unit concerned from the average value is determined. The rising up edge of the ON pulses for the IGBT to be controlled is delayed, corresponding to the magnitude of the deviation. Thus, the output current is balanced between the inverter units.

Abstract: A primary power supply input can be supplied to each of gate driving units through individual transformers, respectively, from power supply terminals. One end of a primary winding of each of the transformers can be connected to the power supply terminal by power supply lines. In addition, the other end of each of the primary windings can be connected to one another by common connection lines to be further connected to a drain terminal of a MOSFET for controlling a current flowing in each of the primary windings. A gate power supply control circuit, to which an output current detected by an auxiliary winding of the transformer is fed back, can control a duty ratio for the on-off control of the MOSFET.

Abstract: An error voltage Verr, being a difference between DC output voltage Vout and output reference voltage Vref, and an input voltage Vin are multiplied to produce first threshold voltage signal Vth1 in phase with and similar to input voltage Vin and proportional to Verr. Second threshold voltage signal Vth2 is produced from first threshold voltage signal Vth1. The input current is detected as a current detection signal Vi across a resistor 12, whether it is between the threshold value signals is detected by a current range detecting circuit, and accordingly, the timing of turning on or off switching device is controlled so that at least one of an duration on and an off duration of the switching device is limited to enhance a power factor. Unfixed off duration disperses a noise spectrum to prevent an increase in switching frequency, to reduce noise.

Abstract: An error voltage Verr, being a difference between DC output voltage Vout and output reference voltage Vref, and an input voltage Vin are multiplied to produce first threshold voltage signal Vth1 in phase with and similar to input voltage Vin and proportional to Verr. Second threshold voltage signal Vth2 is produced from first threshold voltage signal Vth1. The input current is detected as a current detection signal Vi across a resistor 12, whether it is between the threshold value signals is detected by a current range detecting circuit, and accordingly, the timing of turning on or off switching device is controlled so that at least one of an duration on and an off duration of the switching device is limited to enhance a power factor. Unfixed off duration disperses a noise spectrum to prevent an increase in switching frequency, to reduce noise.

Abstract: An uninterruptible power supply unit essentially includes: a DC power supply source 3, a parallel converter 4, and a series converter 6 that are individually connected in parallel to both ends of an electrolytic capacitor Cdc having a pair of capacitors C1 and C2. An input terminal Pin1 is connected to an intermediate point of the electrolytic capacitor Cdc. A power supply line 1n interlinking an input terminal Pin1 and an output terminal Pout2 is connected to multiple switching elements of the parallel converter 4 via a reactor Lin. Likewise, multiple switching elements of the series converter 6 are individually connected to an output terminal Pout1 via another reactor Lout. Multiple capacitors C individually constituting the above-described reactors L and filters are connected in parallel between the input terminals and output terminals.

Abstract: A microcomputer calculates a requisite time for controlling a predetermined device of an internal combustion engine. The microcomputer estimates time required for a crank shaft of the engine to rotate from a present crank angle to a designated crank angle. The microcomputer predicts a relationship between times required for the crank shaft to rotate consecutive angular regions positioned before and after the present crank angle based on measurement result with respect to times required for the crank shaft to rotate consecutive angular regions positioned before and after a preceding crank angle advanced a predetermined amount from the present crank angle.

Abstract: The semiconductor device comprises: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: A microcomputer calculates a requisite time for controlling a predetermined device of an internal combustion engine. The microcomputer estimates time required for a crank shaft of the engine to rotate from a present crank angle to a designated crank angle. The microcomputer predicts a relationship between times required for the crank shaft to rotate consecutive angular regions positioned before and after the present crank angle based on measurement result with respect to times required for the crank shaft to rotate consecutive angular regions positioned before and after a preceding crank angle advanced a predetermined amount from the present crank angle.

Abstract: An uninterruptible power supply unit essentially includes: a DC power supply source 3, a parallel converter 4, and a series converter 6 that are individually connected in parallel to both ends of an electrolytic capacitor Cdc having a pair of capacitors C1 and C2. An input terminal Pin1 is connected to an intermediate point of the electrolytic capacitor Cdc. A power supply line in interlinking an input terminal Pin1 and an output terminal Pout2 is connected to multiple switching elements of the parallel converter 4 via a reactor Lin. Likewise, multiple switching elements of the series converter 6 are individually connected to an output terminal Pout1 via another reactor Lout. Multiple capacitors C individually constituting the above-described reactors L and filters are connected in parallel between the input terminals and output terminals.

Abstract: The semiconductor device includes: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: In an ECU for vehicles, a microcomputer operates with a main power from a battery, and a clock IC operates with sub power from the battery and measures time continuously irrespective of whether the microcomputer is operating. The microcomputer stores time data of the clock IC just before the supply of main power is turned off, and calculates a soak time or engine stop period from the stored time data and a current time data of the clock IC only after the supply of main power is turned on again and engine cranking is completed. This soak time represents the engine stop period. Operation of a cooling water temperature sensor or the like is checked by using the sensor output in relation to the calculated soak time.

Abstract: The semiconductor device comprises: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: In an ECU for vehicles, a clock IC operates with sub power and measures time continuously irrespective of whether a microcomputer is operating. The microcomputer determines whether the clock IC has been reset on the basis of a history indicating that the sub power has fallen below a data holding voltage of an SRAM which also operates on the sub power. Alternatively, the microcomputer determines whether the clock IC has been reset by checking data held in the SRAM. The microcomputer determines failure of a water temperature sensor from a soak time calculated from time data from the clock IC and a detection value of the water temperature sensor on restarting of the engine. When the clock IC has been reset, the microcomputer prohibits this failure determination of the water temperature sensor.

Abstract: The semiconductor device comprises: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: In an ECU for vehicles, a microcomputer operates with a main power from a battery, and a clock IC operates with sub power from the battery and measures time continuously irrespective of whether the microcomputer is operating. The microcomputer stores time data of the clock IC just before the supply of main power is turned off, and calculates a soak time or engine stop period from the stored time data and a current time data of the clock IC only after the supply of main power is turned on again and engine cranking is completed. This soak time represents the engine stop period. Operation of a cooling water temperature sensor or the like is checked by using the sensor output in relation to the calculated soak time.

Abstract: In an ECU for vehicles, a clock IC operates with sub power and measures time continuously irrespective of whether a microcomputer is operating. The microcomputer determines whether the clock IC has been reset on the basis of a history indicating that the sub power has fallen below a data holding voltage of an SRAM which also operates on the sub power. Alternatively, the microcomputer determines whether the clock IC has been reset by checking data held in the SRAM. The microcomputer determines failure of a water temperature sensor from a soak time calculated from time data from the clock IC and a detection value of the water temperature sensor on restarting of the engine. When the clock IC has been reset, the microcomputer prohibits this failure determination of the water temperature sensor.

Abstract: Diodes rows are arranged at interval L in the same direction as that of arrangement of cell rows. Each of the diodes rows has a row of pn junctions each formed on a substrate and arranged along a track vertical to interconnection tracks. The interconnection between cells automatically connect the gates of MOS transistors to the diodes without the need for considering which gate should be connected to the diode. The length of wiring between the gate of MOS transistor and a diode is less than an upper limit value for preventing electrostatic breakdown at a gate oxide in a process of fabricating the semiconductor integrated circuit. Each of the pn junctions may be formed under necessary input signal lines, necessary ground line, the bottom of the drain of MOS transistor or under the power supply line outside of macrocell.

Abstract: Diodes rows are arranged at interval L in the same direction as that of arrangement of cell rows. Each of the diodes rows has a row of pn junctions each formed on a substrate and arranged along a track vertical to interconnection tracks. The interconnection between cells automatically connect the gates of MOS transistors to the diodes without the need for considering which gate should be connected to the diode. The length of wiring between the gate of MOS transistor and a diode is less than an upper limit value for preventing electrostatic breakdown at a gate oxide in a process of fabricating the semiconductor integrated circuit. Each of the pn junctions may be formed under necessary input signal lines, necessary ground line, the bottom of the drain of MOS transistor or under the power supply line outside of macrocell.

Abstract: Diodes rows are arranged at interval L in the same direction as that of arrangement of cell rows. Each of the diodes rows has a row of pn junctions each formed on a substrate and arranged along a track vertical to interconnection tracks. The interconnection between cells automatically connect the gates of MOS transistors to the diodes without the need for considering which gate should be connected to the diode. The length of wiring between the gate of MOS transistor and a diode is less than an upper limit value for preventing electrostatic breakdown at a gate oxide in a process of fabricating the semiconductor integrated circuit. Each of the pn junctions may be formed under necessary input signal lines, necessary ground line, the bottom of the drain of MOS transistor or under the power supply line outside of macrocell.