Abstract: The pulse width modulation control method and RF band power supply device according to the present invention are a pulse width modulation (PWM) control of a single phase PWM inverter in which the modulated wave frequency fs of a modulated wave is set in the RF band. The present control includes each of (a) a frequency synchronization control in which the carrier wave frequency fc of the carrier wave is set to even N times the modulated wave frequency fs, (b) an odd function control in which the modulated wave is set to a sine wave of an odd function and the carrier wave is set to a triangle wave of an odd function, and (c) a phase synchronization control in which the carrier wave is synchronized in phase with the modulated wave in each cycle of the modulated wave.

Abstract: A full-bridge class-D amplifier circuit comprises first through fourth power devices. First conduction terminals of the first and third power devices are coupled to a first power supply voltage, and second conduction terminals of the second and fourth power devices are coupled to a second power supply voltage. A second conduction terminal of the first power device and a first conduction terminal of the second power device are coupled to a first amplifier output. A second conduction terminal of the third power device and a first conduction terminal of the fourth power device are coupled to a second amplifier output. Left and right driver devices respectively disposed adjacent to left and right sides of the first power device have outputs respectively coupled to left and right control terminals respectively disposed on the left and right sides of the first power device.

Abstract: A pulse width modulation control according to the present invention is performed such that, when changing a modulation rate of a modulation wave, the modulation rate is continuously changed from a normal modulation region to an overmodulation region, and, the modulation rate is controlled not to be discontinuous between the normal modulation region and the overmodulation region. In the overmodulation region, limiting the modulation rate ? prevents a jump phenomenon in pulse width from occurring and the continuity of the pulse width from disappearing due to the jump phenomenon. The upper limit ?upper of the modulation rate ? is a threshold at which the pulse width of a PWM pulse signal jumps to a duty ratio of 50%, and limits the modulation rate ? to less than the threshold.

Abstract: A semiconductor device comprises a semiconductor die having a first region and a second region, wherein an operating temperature of the second region is lower than an operating temperature of the first region. A plurality of first tubs are respectively disposed in the first region, the second region, or both. The semiconductor device further comprises a power device comprising a plurality of power device cells, and a diode having a plurality of diode cells. The power devices cells are disposed within tubs or portions of tubs that are in the first region, and the diode cells are disposed within tubs or portions of tubs that are in the second region. The power device may comprise a vertical metal oxide semiconductor field effect transistor (MOSFET), and the diode may comprise a vertical Schottky barrier diode (SBD).

Abstract: In the present invention, when a DC reactor is in a magnetically saturated state, the on/off operations of a switching element are suspended and the switching element is set to an off state for a predetermined period of time, thereby resetting the magnetic saturation of the DC reactor and maintaining the supply of power to a load. After resetting the magnetic saturation, the pulse output of the normal pulse mode is restarted.

Abstract: A carrier wave generation unit comprising a wideband RF power supply divides a whole modulation wave variable frequency range into a plurality of modulation wave frequency sections associated with the number of PWM pulses N based on upper and lower limit frequencies of a carrier wave. In each modulation wave frequency section, an integer number of PWM pulses N associated to each modulation wave frequency section and the modulation wave frequency fs are used to vary a carrier wave frequency fc based on the relationship of fc=N·fs, thereby synchronizing the frequency between a carrier wave C and a modulation wave S to satisfy periodicity.

Abstract: This DC-pulse power supply device is provided with: a DC power supply; a pulse unit (20) for generating a pulse output using a step-up chopper circuit connected to the DC power supply; and a voltage superimposing unit (30A, 30B) connected to a DC reactor of the step-up chopper circuit. The voltage superimposing unit (30A, 30B) superimposes an amount (Vc, VDCL2) corresponding to a superimposed voltage on the output voltage of the step-up chopper circuit. The pulse unit (20) outputs, in a pulse form, the output voltage (Vo) on which the amount (Vc, VDCL2) corresponding to the superimposed voltage is superimposed by the voltage superimposing unit (30A, 30B). The amount corresponding to the superimposed voltage is superimposed on the pulse output of the step-up chopper circuit, thereby raising the output voltage of the pulse output of the step-up chopper circuit.

Abstract: This DC pulse power supply device includes: a DC power supply unit (10); and a pulsing unit (20) that generates a pulse output using a step-up chopper circuit connected to the DC power supply unit. A clamp voltage unit (30) has an output end that is connected to a connection point (s) between a switching element (22) and a DC reactor (21), and applies a clamp voltage (VC) to one end of the switching element (22). During an off period (Toff) of the step-up chopper circuit, the voltage at both ends of the switching element is clamped so as to prevent damage to the switching element, suppress output voltage fluctuations resulting from load current fluctuations, and suppress power loss caused by a load current and a discharge current flowing through a resistor.

Abstract: This DC pulse power supply device comprises a voltage clamper including a capacitor that is connected in parallel to a DC reactor in a chopper circuit provided in a pulsing unit in order to suppress increases in the surge voltage resulting from the leakage inductance of the DC reactor. During the start-up of pulsing operation, which is the initial stage of the pulse mode, the frequency of the pulsing operation of the chopper circuit is controlled over the period until the capacitor voltage is charged to a sufficient voltage to reset the magnetic saturation of the DC reactor.

Abstract: The present invention suppresses influence of control due to the delay time in voltage switching between a plurality of different voltages. A DC/DC converter comprises: a main circuit including a switching circuit; a control unit that performs discrete control by discrete control toward a command value; and a switching signal generation unit that generates a switching signal that drives the switching circuit. The control unit calculates the pulse width ?T(k) of the switching signal having the delay time Td as a parameter as an operation amount of discrete control performed every control period Ts. The switching signal generation unit generates a switching signal based on the pulse width ?T(k) obtained by the calculation in the control unit. The main circuit switches the voltage level by driving the switching circuit based on the switching signal of the switching signal generation unit.

Abstract: In a DC pulse power supply device according to the present invention, at the time of starting pulsing operation, the duty of the pulsing operation of a chopper circuit is controlled, a switching element is set to an ON state, and the pulse width at which the DC reactor is in an energized state is made variable over the period until the capacitor voltage is charged to a sufficient voltage to reset the magnetic saturation of the DC reactor. Gradually increasing the pulse width suppresses the degree of increase in the DC reactor current, and suppresses the DC reactor current below the magnetic saturazion level. As a result, the magnetic saturation of the DC reactor is suppressed at the time of starting pulsing operation.

Abstract: The present invention suppresses unevenness of an input/output current of a full bridge circuit, which is caused due to a cross current generated by a delay operation or the like of a switching element and unevenness of a driver voltage of each switching element, and suppresses an occurrence of an erroneous operation of an amplifier of a class-D full bridge circuit. A driver device of a class-D full bridge amplifier according to the present invention sets, at the same potential in terms of DC, reference potentials on a low-voltage side of two high-side driver circuits which drive two high-side switching elements which constitute a full bridge circuit, and suppresses an occurrence of unevenness of a driver voltage of the switching elements due to a cross current which flows between the bridge circuit and the high-side driver circuits.

Abstract: A full-bridge class-D amplifier circuit comprises first through fourth power devices. First conduction terminals of the first and third power devices are coupled to a first power supply voltage, and second conduction terminals of the second and fourth power devices are coupled to a second power supply voltage. A second conduction terminal of the first power device and a first conduction terminal of the second power device are coupled to a first amplifier output. A second conduction terminal of the third power device and a first conduction terminal of the fourth power device are coupled to a second amplifier output. Left and right driver devices respectively disposed adjacent to left and right sides of the first power device have outputs respectively coupled to left and right control terminals respectively disposed on the left and right sides of the first power device.

Abstract: This DC pulse power supply device comprises a voltage clamper including a capacitor that is connected in parallel to a DC reactor in a chopper circuit provided in a pulsing unit in order to suppress increases in the surge voltage resulting from the leakage inductance of the DC reactor. During the start-up of pulsing operation, which is the initial stage of the pulse mode, the frequency of the pulsing operation of the chopper circuit is controlled over the period until the capacitor voltage is charged to a sufficient voltage to reset the magnetic saturation of the DC reactor.

Abstract: In a DC pulse power supply device according to the present invention, at the time of starting pulsing operation, the duty of the pulsing operation of a chopper circuit is controlled, a switching element is set to an ON state, and the pulse width at which the DC reactor is in an energized state is made variable over the period until the capacitor voltage is charged to a sufficient voltage to reset the magnetic saturation of the DC reactor. Gradually increasing the pulse width suppresses the degree of increase in the DC reactor current, and suppresses the DC reactor current below the magnetic saturazion level. As a result, the magnetic saturation of the DC reactor is suppressed at the time of starting pulsing operation.

Abstract: Provided is multi-phase interleaving control in a power supply device, the control allowing the pulse widths ?T of respective phases to overlap one another, so as to be adaptable to wideband pulse power control. In applying dead beat control to the multi-phase interleaving, constant current control is performed using combined current of the respective phase current values, and the pulse widths ?T(k) is computed under this constant current control, thereby preventing variation of the pulse widths ?T(k) between the phases, and achieving stable power control. Accordingly, the pulse power control becomes adaptable to wideband. Furthermore, wideband control is possible also in two-level pulse power control that performs control by switching at high frequency between High-level power and Low-level power.

Abstract: A control signal may be produced in response to an assertion of a switch signal by asserting the control signal, waiting an adaptive delay after the assertion of the switch signal, de-asserting the control signal in response to the expiration of the adaptive delay, and re-asserting the control signal in response to a current generated according to the control signal becoming zero. The adaptive delay may be adjusted according to a voltage generated using the current. A circuit may include an XOR gate producing the control signal from a switch signal and an output of a Set-Reset Flip-Flop (SRFF), a zero-detect circuit that resets the SRFF when a current generated using the control circuit becomes zero, and a delay circuit to set the SRFF an adaptive delay after assertion of the switch signal and to adjust the adaptive delay according to a voltage generated by the current.

Abstract: In a discrete constant voltage control which carries out a voltage switch between different voltage levels, the present invention suppresses the influence of low-speed output detection voltage, carries out a high-speed transition under stable voltage conditions, and carries out a stabilized control in a constant voltage condition. The DC/DC converter of the present invention, in a discrete constant voltage control for voltage switching which switches different voltage levels and outputs the same, (i) by means of setting a gain A (A1, A2), suppresses the influence of an output voltage detection from following a command voltage and removing the detection output voltage Vo term, and (ii) by means of using an output voltage Vodet, which was estimated from a capacitor current, instead of the low-speed detection output voltage, suppresses the influence of the low-speed detection output voltage and suppresses the influence of a control from a delay time.

Abstract: In the present invention, when a DC reactor is in a magnetically saturated state, the on/off operations of a switching element are suspended and the switching element is set to an off state for a predetermined period of time, thereby resetting the magnetic saturation of the DC reactor and maintaining the supply of power to a load. After resetting the magnetic saturation, the pulse output of the normal pulse mode is restarted.

Abstract: This DC-pulse power supply device is provided with: a DC power supply; a pulse unit (20) for generating a pulse output using a step-up chopper circuit connected to the DC power supply; and a voltage superimposing unit (30A, 30B) connected to a DC reactor of the step-up chopper circuit. The voltage superimposing unit (30A, 30B) superimposes an amount (Vc, VDCL2) corresponding to a superimposed voltage on the output voltage of the step-up chopper circuit. The pulse unit (20) outputs, in a pulse form, the output voltage (Vo) on which the amount (Vc, VDCL2) corresponding to the superimposed voltage is superimposed by the voltage superimposing unit (30A, 30B). The amount corresponding to the superimposed voltage is superimposed on the pulse output of the step-up chopper circuit, thereby raising the output voltage of the pulse output of the step-up chopper circuit.