Patents by Inventor Iwao Higashikawa

Iwao Higashikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100081091
    Abstract: According to an aspect of the present invention, there is provided a method for manufacturing a semiconductor device, the method including; sequentially forming a first film and a second film on a base film; processing the second film, thereby forming a second pattern; processing the first film with the second pattern, thereby forming a first pattern; removing the second pattern; depositing a third film on the base film and the first pattern; processing the third film, thereby forming a third pattern on side walls of the first pattern; removing the first pattern; and processing the base film with the third pattern; wherein, when processing the third film, a process condition is adjusted based on at least one information of a size of the second pattern and a size of the first pattern.
    Type: Application
    Filed: September 9, 2009
    Publication date: April 1, 2010
    Inventors: Koji HASHIMOTO, Daisuke Kawamura, Kentaro Matsunaga, Iwao Higashikawa
  • Publication number: 20090141378
    Abstract: An optical element includes a substrate, a magnetostrictive film arranged on the substrate, a film thickness of the magnetostrictive film varying in accordance with intensity of a magnetic field, and a reflection film arranged on the magnetostrictive film and reflects light. An optical apparatus includes a stage including a holder provided with plural holes arranged in a carrying surface thereof for carrying an optical element provided with a magnetostrictive film arranged on a substrate, a film thickness of the magnetostrictive film varying in accordance with intensity of a magnetic field, and a reflection film arranged on the magnetostrictive film and reflecting light, plural magnetic field generation parts embedded in the plural holes, and a control mechanism for controlling the magnetic field generated by each of the plural magnetic field generation parts, and controlling the film thickness of the magnetostrictive film.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 4, 2009
    Inventors: Kazuo TAWARAYAMA, Tatsuhiko Higashiki, Iwao Higashikawa
  • Patent number: 6806941
    Abstract: A method of forming a pattern for a semiconductor device comprises the steps of forming a photosensitive film on a substrate and radiating the photosensitive film on the substrate with a beam of a predetermined shape consisting of one of a charged particle beam and an electromagnetic beam, thereby forming an exposed region of a desired shape, the latter step including the step of exposing each of unit regions by a single shot of the beam of the predetermined shape for a predetermined period of time, repeating the exposure a plurality of times, and butt-joining the exposed unit regions to thereby form the exposed region of the desired shape, wherein, in the step of forming the exposed region of the desired shape, butting portions of the unit regions are situated in a first area of a layer to be formed other than a second area in the layer in which predetermined characteristics of a function of the semiconductor device are determined by a pattern width of the exposed region in association with another pattern f
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: October 19, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Soichi Inoue, Iwao Higashikawa, Yoji Ogawa, Shigehiro Hara, Kazuko Yamamoto
  • Patent number: 6765673
    Abstract: Disclosed is a pattern forming method, in which a mask blank for preparation of a photomask is exposed in a desired pattern to form a mask pattern on the mask blank. Position measuring marks are formed on the diagonally facing corners of a main surface of the mask blank to detect a defect on the main surface of the mask blank. The relative positions of the detected defect and the mask pattern that is to be formed on the mask blank are compared, and the pattern position is selected such that the defect overlaps with the pattern. Then, the position measuring marks are measured to calculate the exposure position, and exposure treatment is applied to the selected position.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: July 20, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Iwao Higashikawa
  • Patent number: 6680462
    Abstract: Disclosed is an apparatus for heating a target substrate by means of light irradiation. The heating apparatus includes a substrate support section for supporting the target substrate, an irradiating light generating section for irradiating the light irradiating regions of the target substrate supported by the substrate support section, and a light irradiating region changing section for changing the light irradiating regions of the target substrate irradiated with the light generated from the irradiating light generation section.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: January 20, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Sakurai, Shinichi Ito, Iwao Higashikawa, Akitoshi Kumagae
  • Patent number: 6635549
    Abstract: A method of producing an exposure mask by carrying out at least two times of exposure on a mask substrate, wherein at a first time of pattern exposure, alignment marks to be reference for positioning at a second time of exposure are exposed onto a position on the mask substrate with positional error by substrate deformation obtained in advance with an exposure apparatus to be used corrected, and at a second time of pattern exposure, positional error by substrate deformation obtained in advance with the exposure apparatus to be used is corrected and thereby the position of the alignment marks are detected, and on the basis of the detected position of the alignment marks, the positions between exposure patterns are aligned.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: October 21, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Suigen Kyoh, Iwao Higashikawa
  • Patent number: 6542237
    Abstract: An exposure method forms a plurality of patterns on a substrate, which is set on a stage of an exposure apparatus, through at least one mask. The method equalizes first positional linear error components of a pattern to be formed by the mask on a first coordinate system defined on the substrate to second positional linear error components of the pattern on a second coordinate system on which the stage is moved, by correcting coordinates for moving the stage on the second coordinate system. The method is capable of aligning the boundaries of patterns with each other on the substrate, to leave only positional linear error components on the patterns. These positional linear error components are removable to leave minimum random residual errors on the patterns, and therefore, the patterns on the substrate are precisely at specified positions.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: April 1, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Suigen Kyoh, Iwao Higashikawa, Soichi Inoue
  • Publication number: 20030052119
    Abstract: Disclosed is a heat treating method for heating a target substrate by means of light irradiation, in which a light irradiation treatment is applied to the target substrate a plurality of times such that adjacent light irradiated regions on the target substrate partially overlap with each other and that the adjacent light irradiated regions do not overlap with each other in the light irradiating periods.
    Type: Application
    Filed: October 29, 2002
    Publication date: March 20, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Sakurai, Shinichi Ito, Iwao Higashikawa, Akitoshi Kumagae
  • Patent number: 6495807
    Abstract: Disclosed is a heat treating method for heating a target substrate by means of light irradiation, in which light irradiation treatment is applied to the target substrate such that the light irradiation regions of the target substrate do not overlap with each other, the light irradiation treatment being performed by using an irradiating light adjusted such that the distribution of the light intensity within the light irradiation region of the target substrate is rendered uniform.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: December 17, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Sakurai, Shinichi Ito, Iwao Higashikawa, Akitoshi Kumagae
  • Patent number: 6483083
    Abstract: A substrate to be processed on which a thin film is formed is supported by a support member. The substrate to be processed is heated by a heating section. The surface temperature is measured by a radiation thermometer, and the heating temperature of the heating section is controlled by a control section, in response to the temperature measured by the radiation thermometer. Further, a blackbody is provided at a position optically symmetrical to the radiation thermometer with respect to the surface of the thin film. The blackbody is set at a constant temperature. The blackbody cuts stray light (noise light) which enters into the radiation thermometer.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: November 19, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Sakurai, Akitoshi Kumagae, Iwao Higashikawa, Shinichi Ito, Tsunetoshi Arikado, Katsuya Okumura
  • Publication number: 20020063123
    Abstract: Disclosed is a heat treating method for heating a target substrate by means of light irradiation, in which a light irradiation treatment is applied to the target substrate a plurality of times such that adjacent light irradiated regions on the target substrate partially overlap with each other and that the adjacent light irradiated regions do not overlap with each other in the light irradiating periods.
    Type: Application
    Filed: October 25, 2001
    Publication date: May 30, 2002
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Sakurai, Shinichi Ito, Iwao Higashikawa, Akitoshi Kumagae
  • Publication number: 20020045132
    Abstract: A method of forming a pattern for a semiconductor device comprises the steps of forming a photosensitive film on a substrate and radiating the photosensitive film on the substrate with a beam of a predetermined shape consisting of one of a charged particle beam and an electromagnetic beam, thereby forming an exposed region of a desired shape, the latter step including the step of exposing each of unit regions by a single shot of the beam of the predetermined shape for a predetermined period of time, repeating the exposure a plurality of times, and butt-joining the exposed unit regions to thereby form the exposed region of the desired shape, wherein, in the step of forming the exposed region of the desired shape, butting portions of the unit regions are situated in a first area of a layer to be formed other than a second area in the layer in which predetermined characteristics of a function of the semiconductor device are determined by a pattern width of the exposed region in association with another pattern f
    Type: Application
    Filed: December 10, 2001
    Publication date: April 18, 2002
    Inventors: Soichi Inoue, Iwao Higashikawa, Yoji Ogawa, Shigehiro Hara, Kazuko Yamamoto
  • Publication number: 20020037625
    Abstract: A method of producing an exposure mask by carrying out at least two times of exposure on a mask substrate, wherein at a first time of pattern exposure, alignment marks to be reference for positioning at a second time of exposure are exposed onto a position on the mask substrate with positional error by substrate deformation obtained in advance with an exposure apparatus to be used corrected, and at a second time of pattern exposure, positional error by substrate deformation obtained in advance with the exposure apparatus to be used is corrected and thereby the position of the alignment marks are detected, and on the basis of the detected position of the alignment marks, the positions between exposure patterns are aligned.
    Type: Application
    Filed: September 25, 2001
    Publication date: March 28, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Suigen Kyoh, Iwao Higashikawa
  • Patent number: 6340542
    Abstract: A method of manufacturing a semiconductor device, light is applied through the cell patterns made in master masks, thereby transferring the cell patterns to, and forming the cell patterns on, a wafer. On the basis of layout data representing a layout diagram of the semiconductor device, the pattern data of the device is divided along the boundaries of the function blocks of the device, generating pattern data items. Master masks are prepared in accordance with the pattern data items. Light is applied to the wafer, first through the master mask and then through the master mask. The cell patterns made in the master masks are transferred to the wafer.
    Type: Grant
    Filed: December 6, 1999
    Date of Patent: January 22, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Soichi Inoue, Suigen Kyoh, Iwao Higashikawa, Ichiro Mori
  • Patent number: 6335145
    Abstract: A method of forming a pattern for a semiconductor device comprises the steps of forming a photosensitive film on a substrate and radiating the photosensitive film on the substrate with a beam of a predetermined shape consisting of one of a charged particle beam and an electromagnetic beam, thereby forming an exposed region of a desired shape, the latter step including the step of exposing each of unit regions by a single shot of the beam of the predetermined shape for a predetermined period of time, repeating the exposure a plurality of times, and butt-joining the exposed unit regions to thereby form the exposed region of the desired shape, wherein, in the step of forming the exposed region of the desired shape, butting portions of the unit regions are situated in a first area of a layer to be formed other than a second area in the layer in which predetermined characteristics of a function of the semiconductor device are determined by a pattern width of the exposed region in association with another pattern f
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: January 1, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Soichi Inoue, Iwao Higashikawa, Yoji Ogawa, Shigehiro Hara, Kazuko Yamamoto
  • Patent number: 6333138
    Abstract: An exposure method of sequential beam, contributing to the improvement of alignment accuracy at connecting portion at the end part of an exposure region, as well as pattern dimension accuracy is provided.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: December 25, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Iwao Higashikawa, Takayuki Abe
  • Patent number: 6333493
    Abstract: Disclosed is a heat treating method for heating a target substrate by means of light irradiation, in which a light irradiation treatment is applied to the target substrate a plurality of times such that adjacent light irradiated regions on the target substrate partially overlap with each other and that the adjacent light irradiated regions do not overlap with each other in the light irradiating periods.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: December 25, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Sakurai, Shinichi Ito, Iwao Higashikawa, Akitoshi Kumagae
  • Patent number: 6319637
    Abstract: A main pattern region is projected to a substrate to be exposed while a defective portion including a defect generated in the main pattern region of an original mask is masked. Thereafter, a spare pattern corresponding to the defective portion is further projected on the substrate. In this manner, it is possible to prevent the defect of the main pattern region of the original mask from being transferred to the substrate. The pattern accuracy of the repair portion is the same as that of the exposed portion from the original mask. Therefore, the repair can be made with a high accuracy. Furthermore, it is possible to repair the defect produced at a pattern edge portion with a high accuracy without limitations given by a conventional repair technique.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: November 20, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Iwao Higashikawa, Suigen Kyoh
  • Publication number: 20010027971
    Abstract: A substrate to be processed on which a thin film is formed is supported by a support member. The substrate to be processed is heated by a heating section. The surface temperature is measured by a radiation thermometer, and the heating temperature of the heating section is controlled by a control section, in response to the temperature measured by the radiation thermometer. Further, a blackbody is provided at a position optically symmetrical to the radiation thermometer with respect to the surface of the thin film. The blackbody is set at a constant temperature. The blackbody cuts stray light (noise light) which enters into the radiation thermometer.
    Type: Application
    Filed: June 11, 2001
    Publication date: October 11, 2001
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Sakurai, Akitoshi Kumagae, Iwao Higashikawa, Shinichi Ito, Tsunetoshi Arikado, Katsuya Okumura
  • Patent number: 6265696
    Abstract: A substrate to be processed on which a thin film is formed is supported by a support member. The substrate to be processed is heated by a heating section. The surface temperature is measured by a radiation thermometer, and the heating temperature of the heating section is controlled by a control section, in response to the temperature measured by the radiation thermometer. Further, a blackbody is provided at a position optically symmetrical to the radiation thermometer with respect to the surface of the thin film. The blackbody is set at a constant temperature. The blackbody cuts stray light (noise light) which enters into the radiation thermometer.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: July 24, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Sakurai, Akitoshi Kumagae, Iwao Higashikawa, Shinichi Ito, Tsunetoshi Arikado, Katsuya Okumura