Abstract: The present disclosure provides a system and a method for quickly diagnosing, classifying, and sampling in-line defects based on a CAA pre-diagnosis database. The method includes the steps of obtaining a design layout of an object and a defect data of an important process stage of the object, obtaining a pre-diagnosis data group related to the design layout from a CAA pre-diagnosing database, and judging a killer defect index and a failure risk level of the defect data according to the pre-diagnosis data group.

Abstract: The instant disclosure provides an intelligent CAA (Critical Area Analysis) failure pre-diagnosis system and method for a design layout. The intelligent CAA failure pre-diagnosis method includes the steps of obtaining a design layout of an object and defining at least one layout region having a layout pattern thereon, obtaining a plurality of defects, comparing the defects one-by-one to a predetermined portion of the layout pattern in the order of their sizes, and calculating a CAA failure risk level of the layout region according to the comparison result.

Abstract: Disclosure is related to a method and a system for intelligent defect classification and sampling, and a computer-readable storage device. The computer-implemented method acquires in-line defect inspection file, and retrieves the defect patterns over a device under test, e.g. a wafer from a fab. The system incorporates a defect pattern recognition engine to recognize the defect signature patterns from the defect patterns. A sampling scheme is performed to acquire weak defect patterns. A critical area analysis based on failure probability of weak patterns is incorporated to performing the sampling. The defect layout pattern groups probably causing the open or short failure can be obtained. The defect signature patterns through sampling are then displayed using a browsing system. Through a user interface, the user can perform functions, such as filtering, selection and merging, onto the defect patterns.

Abstract: Disclosed is an integrated interfacing system for intelligent defect yield solutions. The integrated interfacing system is configured to have a web server, which initiates a web interface for containing a plurality of functional items provided for clicking to activate a corresponding function. Through the graphical user interface, users may select one or more functions for viewing the multiple solutions regarding wafer yield. The system uses a memory to store the computer-executable instructions for selectively performing corresponding functionalities. When the wafer images are inputted through the interface, the system performs a defect coordinate conversion, dashboard summary, defect screening, defect sampling, defect yield diagnosis, design for yield, yield prediction, pattern diagnosis, data management, and system administration. By the interfacing system, an additional viewing method is also introduced to provision of full-chip viewing over the data retrieved during the wafer manufacturing procedure.

Abstract: A method for building a rule of thumb of defect classification is illustrated. Multiple defect classification images with killer defects of examples and all material information of processes associated with the defect, the pattern, and the background are input into the fab tool. The fab tool obtains image characteristics, process characteristics, and image relativity characteristics of the defects, the pattern, and the background in each of the input images, wherein the input images comprises the defect classification images with killer defects of examples. The rule of thumb of the defect classification is built based on the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in each of the input images.

Abstract: Disclosure herein is related to a method and a system for intelligent weak pattern diagnosis for semiconductor product, and a related non-transitory computer-readable storage medium. In the method, a weak pattern layout is firstly retrieved from a defect pattern library and a frequent failure defect pattern library; defect data is retrieved from fab defect inspection tool; a design layout is then received and weak defect pattern screen is performed to extract known and unknown weak defect patterns. In addition to updating the weak pattern library, the weak pattern contour can be made upon SEM image data, and then the true systematic weak pattern can be justified.

Abstract: An intelligent defect diagnosis method for manufacturing fab is provided. The intelligent defect diagnosis method comprises: receiving pluralities of defect data, design layouts and fabrication data; analyzing the defect data, design layouts, and the fabrication data by a defect analysis system, wherein the analyzing step further contains the sub-steps: segmenting and grouping the design layouts into pluralities of multi-pattern group cells to construct LPG cell based pattern groups; introducing the defect data; segmenting defect image into pluralities of defect and pattern contours; mapping the defect data to each multi-pattern group cell to form the LPG based defect composite pattern group; performing coordinate conversion and pattern match between image contour and design layout for coordinate correction; fulfilling CAA with defect contour, pattern contour and design layout, and obtaining corresponding defect yield; classifying the defect type of defect data through defect image classification analysis.

Abstract: An intelligent defect diagnosis method for manufacturing fab is provided. The intelligent defect diagnosis method comprises: receiving pluralities of defect data, design layouts and fabrication data; analyzing the defect data, design layouts, and the fabrication data by a defect analysis system, wherein the analyzing step further contains the sub-steps: segmenting and grouping the design layouts into pluralities of multi-pattern group cells to construct LPG cell based pattern groups; introducing the defect data; segmenting defect image into pluralities of defect and pattern contours; mapping the defect data to each multi-pattern group cell to form the LPG based defect composite pattern group; performing coordinate conversion and pattern match between image contour and design layout for coordinate correction; fulfilling CAA with defect contour, pattern contour and design layout, and obtaining corresponding defect yield; classifying the defect type of defect data through defect image classification analysis.

Abstract: Disclosed is an integrated interfacing system for intelligent defect yield solutions. The integrated interfacing system is configured to have a web server, which initiates a web interface for containing a plurality of functional items provided for clicking to activate a corresponding function. Through the graphical user interface, users may select one or more functions for viewing the multiple solutions regarding wafer yield. The system uses a memory to store the computer-executable instructions for selectively performing corresponding functionalities. When the wafer images are inputted through the interface, the system performs a defect coordinate conversion, dashboard summary, defect screening, defect sampling, defect yield diagnosis, design for yield, yield prediction, pattern diagnosis, data management, and system administration. By the interfacing system, an additional viewing method is also introduced to provision of full-chip viewing over the data retrieved during the wafer manufacturing procedure.

Abstract: A method for building a rule of thumb of defect classification is illustrated. Multiple defect classification images with killer defects of examples and all material information of processes associated with the defect, the pattern, and the background are input into the fab tool. The fab tool obtains image characteristics, process characteristics, and image relativity characteristics of the defects, the pattern, and the background in each of the input images, wherein the input images comprises the defect classification images with killer defects of examples. The rule of thumb of the defect classification is built based on the process characteristics, the image characteristics, and the image relativity characteristics of the defects, the pattern, and the background in each of the input images.

Abstract: A method for utilizing fabrication defect of an article includes steps of obtaining a defect image from a fabrication process for fabricating the article, wherein the defect image includes a defect and fabricated circuit patterns around the defect; obtaining coordinates of the defect; retrieving a layout of the article including design circuit patterns; extracting a contour of the defect from the defect image; superposing the contour of the defect on the layout according to the coordinates of the defect; and determining whether the defect causes a open failure or a short failure on the layout by analyzing overlaps between the contour of the defect and the design circuit patterns. Therefore, the article's health can be monitored during the fabrication process, not until the end of the fabrication process.

Abstract: A method for smart defect review is disclosed. The method includes pre-processing a design layout into a plurality of layout based pattern groups, dividing the design layout into a plurality of cells, overlapping the cells belong to the same layout based pattern groups, extracting a plurality of defect data of all defects on a wafer, constructing a plurality of layout based defect composite pattern groups, executing layout pattern match to obtain each individual layout based defect composite pattern group, performing some defect sample selection rules to each layout based defect composite pattern group, sorting the layout based defect composite pattern groups into different defect types, obtaining a defect image file by reviewing different sample number of defect image from each layout based defect composite pattern group, and generating a defect pattern library or a defect yield prediction by performing a defect yield diagnosis to the defect image file.

Abstract: A method for smart defect review is disclosed. The method includes pre-processing a design layout into a plurality of layout based pattern groups, dividing the design layout into a plurality of cells, overlapping the cells belong to the same layout based pattern groups, extracting a plurality of defect data of all defects on a wafer, constructing a plurality of layout based defect composite pattern groups, executing layout pattern match to obtain each individual layout based defect composite pattern group, performing some defect sample selection rules to each layout based defect composite pattern group, sorting the layout based defect composite pattern groups into different defect types, obtaining a defect image file by reviewing different sample number of defect image from each layout based defect composite pattern group, and generating a defect pattern library or a defect yield prediction by performing a defect yield diagnosis to the defect image file.

Abstract: A method for defect diagnosis and management, which is implemented in a process for fabricating an article, comprising the following steps: obtaining an inspection image of the article, wherein the inspection image shows at least one defect of the article; retrieving a design layout corresponding to the inspection image, wherein the design layout has a plurality of conductive regions; matching the inspection image and the design layout for correcting the coordinates of the defect on the design layout; and judging the overlaps of the conductive regions so as to obtain a short failure if the defect covers two conductive regions, obtain a open failure if the defect intercepts one of conductive region, or obtain no failure if the defect overlaps one of conductive region but not intercepts or covers another conductive region.

Abstract: A method for utilizing fabrication defect of an article comprises steps of obtaining a defect image from a fabrication process for fabricating the article, wherein the defect image comprises a defect and fabricated circuit patterns around the defect; obtaining coordinates of the defect; retrieving a layout of the article comprising design circuit patterns; extracting a contour of the defect from the defect image; superposing the contour of the defect on the layout according to the coordinates of the defect; and determining whether the defect causes a open failure or a short failure on the layout by analyzing overlaps between the contour of the defect and the design circuit patterns. Therefore, the article's health can be monitored during the fabrication process, not until the end of the fabrication process.

Abstract: A method is provided for simulating leakage distribution of integrated circuit design. The method analyzes a layout of the integrated circuit design to understand the groups of dimensions of the transistors and capacitors of the layout, and then simulates a leakage distribution of the layout resulted from possible fabrication process variations. Therefore, designer can know the leakage distribution of the integrated circuit design before the integrated circuit design is actually fabricated, and modify the layout if a leakage failure happens to the layout.

Abstract: A method for defect diagnosis and management, which is implemented in a process for fabricating an article, comprising the following steps: obtaining an inspection image of the article, wherein the inspection image shows at least one defect of the article; retrieving a design layout corresponding to the inspection image, wherein the design layout has a plurality of conductive regions; matching the inspection image and the design layout for correcting the coordinates of the defect on the design layout; and determining overlaps between the defect and the conductive regions to judge whether the defect causes an open failure or a short failure. Via this method, the accurate coordinates of the defect on the design layout can be found, so that the defect can be further judged as to whether it will cause a failure, or not.