Patents by Inventor J. Banks

J. Banks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090122696
    Abstract: There is disclosed a source messaging system having a queue for receiving messages. The source messaging system has means for determining whether a message should be permitted to become INDOUBT. This is done by retrieving a value denoting the maximum number of messages that may be permitted to become INDOUBT at any one time; determining whether the message falls within the range denoted by the value; and responsive to determining that the message falls within the range, permitting the message to become INDOUBT.
    Type: Application
    Filed: November 13, 2008
    Publication date: May 14, 2009
    Applicant: International Business Machines Corporation
    Inventors: Andrew D J Banks, David Ware
  • Patent number: 7525964
    Abstract: A method, system, and computer program for delivering messages and data to competing consumers. One aspect of the invention includes a message delivery system including a destination messaging engine, one or more receiver messaging engines, and a message pool. The destination messaging engine is configured to distribute data from one or more producers. The receiver messaging engines are configured to request data from the destination messaging engine and transmit the data to one or more consumers. The message pool is configured to store data from the producers, with the destination messaging engine arbitrating data in the message pool among the receiver messaging engines.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: April 28, 2009
    Assignee: International Business Machines Corporation
    Inventors: Mark C. Astley, Andrew D. J. Banks, Sumeer K. Bhola, Ignacio Silva-Lepe, Michael J. Ward, David Ware
  • Patent number: 7466648
    Abstract: There is disclosed a source messaging system having a queue for receiving messages. The source messaging system has means for determining whether a message should be permitted to become INDOUBT. This is done by retrieving a value denoting the maximum number of messages that may be permitted to become INDOUBT at any one time; determining whether the message falls within the range denoted by the value; and responsive to determining that the message falls within the range, permitting the message to become INDOUBT.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: December 16, 2008
    Assignee: International Business Machines Corporation
    Inventors: Andrew D J Banks, David Ware
  • Publication number: 20080239829
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals may be dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Application
    Filed: October 22, 2007
    Publication date: October 2, 2008
    Inventor: Gerald J. Banks
  • Publication number: 20080219049
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell can be performed without actually reading the memory state of the cell during the programming operation. A plurality of the memory cells are preferably arranged in a matrix of rows and columns disposed substantially in a rectangle, with a plurality of word lines coupled with memory gate electrodes intersecting a first side of the rectangle substantially perpendicularly, a plurality of bit lines coupled with memory drain-source current paths intersecting a second side of the rectangle substantially perpendicularly (the second side also substantially perpendicularly intersecting the first side), a row select circuit being disposed at the first side for coupling with the word lines, and peripheral circuitry including a column select circuit and a sense circuit being disposed at the second side.
    Type: Application
    Filed: September 26, 2007
    Publication date: September 11, 2008
    Inventor: Gerald J. BANKS
  • Publication number: 20080054177
    Abstract: A method and apparatus for Flow Injection Analysis (FIA) into Atmospheric Pressure Ion sources (API) including Electrospray (ES) and Atmospheric Pressure Chemical Ionization (APCI) sources whereby the sampling and spray needles are one and the same. The sampling and spray needle configured with an autoinjector apparatus or used in manual injection is introduced directly into a mating ES or APCI probe configured in an API source. Such a sampling and spray needle eliminates the need for injector valves, transfer lines or additional fluid delivery systems in FIA into API sources interfaced to mass spectrometers or other chemical analyzers. The use of a sampling and spray needle configuration reduces component costs, liquid dead volume, sample dilution effects, and minimizes cross contamination effects, solvent consumption and waste while increasing sample throughput.
    Type: Application
    Filed: April 26, 2002
    Publication date: March 6, 2008
    Inventors: Bruce Andrien, J. Banks, James Boyle
  • Patent number: 7286414
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals may be dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: October 23, 2007
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 7075825
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell can be performed without actually reading the memory state of the cell during the programming operation. A plurality of the memory cells are preferably arranged in a matrix of rows and columns disposed substantially in a rectangle, with a plurality of word lines coupled with memory gate electrodes intersecting a first side of the rectangle substantially perpendicularly, a plurality of bit lines coupled with memory drain-source current paths intersecting a second side of the rectangle substantially perpendicularly (the second side also substantially perpendicularly intersecting the first side), a row select circuit being disposed at the first side for coupling with the word lines, and peripheral circuitry including a column select circuit and a sense circuit being disposed at the second side.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: July 11, 2006
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Publication number: 20060145069
    Abstract: A method and apparatus for Flow Injection Analysis (FIA) into Atmospheric Pressure Ion sources (API) including Electrospray (ES) and Atmospheric Pressure Chemical Ionization (APCI) sources whereby the sampling and spray needles are one and the same. The sampling and spray needle configured with an autoinjector apparatus or used in manual injection is introduced directly into a mating ES or APCI probe configured in an API source. Such a sampling and spray needle eliminates the need for injector valves, transfer lines or additional fluid delivery systems in FIA into API sources interfaced to mass spectrometers or other chemical analyzers. The use of a sampling and spray needle configuration reduces component costs, liquid dead volume, sample dilution effects, and minimizes cross contamination effects, solvent consumption and waste while increasing sample throughput.
    Type: Application
    Filed: March 10, 2005
    Publication date: July 6, 2006
    Inventors: Bruce Andrien, J. Banks, James Boyle
  • Patent number: 7068542
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals may be dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: June 27, 2006
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Publication number: 20060089193
    Abstract: Methods and systems for creating, managing, and operating electronic games are provided. Example embodiments provide a DVD game environment (“DGE”) that includes game flow logic, interactive DVD game content, enhanced methods of scoring and play, automatic skill level adjustment, and an electronic game board. In one embodiment, the DGE comprises DVD game logic with scoring management, game and participant state information, video and audio game content, and an electronic game board. These components provide functionality that can be incorporated into a DVD game that presents challenges for entertainment, education, training, or testing purposes. The DVD games produced thereby can automatically provide challenges based upon participants' skill levels and automatically detect the correctness or incorrectness of a response in order to maintain an electronic game board.
    Type: Application
    Filed: June 6, 2005
    Publication date: April 27, 2006
    Applicant: The EduGaming Corporation
    Inventors: Kurt Buecheler, Peter Sauers, J. Banks, Alexander Smith
  • Patent number: 7006384
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals may be dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: February 28, 2006
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6870763
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell can be performed without actually reading the memory state of the cell during the programming operation. A plurality of the memory cells are preferably arranged in a matrix of rows and columns disposed substantially in a rectangle, with a plurality of word lines coupled with memory gate electrodes intersecting a first side of the rectangle substantially perpendicularly, a plurality of bit lines coupled with memory drain-source current paths intersecting a second side of the rectangle substantially perpendicularly (the second side also substantially perpendicularly intersecting the first side), a row select circuit being disposed at the first side for coupling with the word lines, and peripheral circuitry including a column select circuit and a sense circuit being disposed at the second side.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: March 22, 2005
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6827287
    Abstract: Provided is a system for delivering a liquid sample to an inlet of an analytical instrument. Included is an acoustic ejector driven by a drive system that generates drive signals provided to the ejector. The drive signals are generated with a pulse width sufficient to eject at least a portion of the liquid sample. A reservoir provided for holding the liquid sample is in operational arrangement with the acoustic ejector. A liquid sample voltage source is located within the reservoir, and the liquid sample voltage source is designed to provide a charge to the liquid sample. An analytical instrument voltage source is in operational arrangement with the analytical instrument and is designed to provide a voltage bias between the reservoir and the analytical instrument. In another aspect of the invention, provided is a method for delivering a liquid sample to an inlet of an analytical instrument.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: December 7, 2004
    Assignees: Palo Alto Research Center, Incorporated, The Sripps Research Institute
    Inventors: Scott A. Elrod, Steven J. Bank
  • Publication number: 20040242009
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell can be performed without actually reading the memory state of the cell during the programming operation. A plurality of the memory cells are preferably arranged in a matrix of rows and columns disposed substantially in a rectangle, with a plurality of word lines coupled with memory gate electrodes intersecting a first side of the rectangle substantially perpendicularly, a plurality of bit lines coupled with memory drain-source current paths intersecting a second side of the rectangle substantially perpendicularly (the second side also substantially perpendicularly intersecting the first side), a row select circuit being disposed at the first side for coupling with the word lines, and peripheral circuitry including a column select circuit and a sense circuit being disposed at the second side.
    Type: Application
    Filed: March 25, 2004
    Publication date: December 2, 2004
    Applicant: BTG International Inc.
    Inventor: Gerald J. Banks
  • Publication number: 20040179397
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell can be performed without actually reading the memory state of the cell during the programming operation. A plurality of the memory cells are preferably arranged in a matrix of rows and columns disposed substantially in a rectangle, with a plurality of word lines coupled with memory gate electrodes intersecting a first side of the rectangle substantially perpendicularly, a plurality of bit lines coupled with memory drain-source current paths intersecting a second side of the rectangle substantially perpendicularly (the second side also substantially perpendicularly intersecting the first side), a row select circuit being disposed at the first side for coupling with the word lines, and peripheral circuitry including a column select circuit and a sense circuit being disposed at the second side.
    Type: Application
    Filed: March 25, 2004
    Publication date: September 16, 2004
    Applicant: BTG International Inc.
    Inventor: Gerald J. Banks
  • Publication number: 20040158961
    Abstract: A decorative carapace for a burial vault including a carapace having a top surface and a substrate having a decorative graphic, the substrate being attached to the top surface of the carapace.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 19, 2004
    Inventors: Christie M. Cox, Marty J. Cox, Michael J. Banks
  • Publication number: 20040136237
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals may be dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 15, 2004
    Applicant: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6724656
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell can be performed without actually reading the memory state of the cell during the programming operation. A plurality of the memory cells are preferably arranged in a matrix of rows and columns disposed substantially in a rectangle, with a plurality of word lines coupled with memory gate electrodes intersecting a first side of the rectangle substantially perpendicularly, a plurality of bit lines coupled with memory drain-source current paths intersecting a second side of the rectangle substantially perpendicularly (the second side also substantially perpendicularly intersecting the first side), a row select circuit being disposed at the first side for coupling with the word lines, and peripheral circuitry including a column select circuit and a sense circuit being disposed at the second side.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: April 20, 2004
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6714455
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals may be dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: March 30, 2004
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks