Patents by Inventor J. Banks

J. Banks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6324121
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell is conducted by applying a plurality of programming signals having different characteristics to the cell. The programming signals include at least a first programming signal which programs the cell by a first increment and a subsequent programming signal which programs the cell by a second increment smaller than the first increment. As the cell is being programmed to a selected state, its programming status is verified independently of reference values bounding the memory states. For this purpose, a signal indicative of the programming status (e.g., the cell's bit line signal) is compared with a reference signal corresponding to the selected state but having a value different from the reference value or values bounding the selected state. The programming operation can thus be controlled without actually reading the memory state of the cell.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: November 27, 2001
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Publication number: 20010040824
    Abstract: A multi-bit memory device with a memory cell means for storing input information for an indefinite period of time. The multi-bit memory means stores information in up to Kn memory states (Kn>1). A memory cell programming means and comparator means is also included. The present multi-bit memory device also includes a voltage divider arrangement with pull-up devices in a memory array to provide stable and accurate reference voltages over process, temperature, and voltage variations.
    Type: Application
    Filed: February 28, 2001
    Publication date: November 15, 2001
    Inventor: Gerald J. Banks
  • Publication number: 20010033512
    Abstract: A multi-bit memory device with a memory cell means for storing input information for an indefinite period of time. The multi-bit memory means stores information in up to Kn memory states (Kn>1). A memory cell programming means and comparator means is also included. The present multi-bit memory device also includes a voltage divider arrangement with pull-up devices in a memory array to provide stable and accurate reference voltages over process, temperature, and voltage variations.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 25, 2001
    Inventor: Gerald J. Banks
  • Publication number: 20010019500
    Abstract: A multi-bit memory device with a memory cell means for storing input information for an indefinite period of time. The multi-bit memory means stores information in up to Kn memory states (Kn>1). A memory cell programming means and comparator means is also included. The present multi-bit memory device also includes a voltage divider arrangement with pull-up devices in a memory array to provide stable and accurate reference voltages over process, temperature, and voltage variations.
    Type: Application
    Filed: January 28, 2000
    Publication date: September 6, 2001
    Inventor: Gerald J. Banks
  • Publication number: 20010008489
    Abstract: A multi-bit memory device with a memory cell means for storing input information for an indefinite period of time. The multi-bit memory means stores information in up to Kn memory states (Kn>1). A memory cell programming means and comparator means is also included. The present multi-bit memory device also includes a voltage divider arrangement with pull-up devices in a memory array to provide stable and accurate reference voltages over process, temperature, and voltage variations.
    Type: Application
    Filed: February 28, 2001
    Publication date: July 19, 2001
    Inventor: Gerald J. Banks
  • Publication number: 20010006477
    Abstract: A multi-bit memory device with a memory cell means for storing input information for an indefinite period of time. The multi-bit memory means stores information in up to Kn memory states (Kn>1). A memory cell programming means and comparator means is also included. The present multi-bit memory device also includes a voltage divider arrangement with pull-up devices in a memory array to provide stable and accurate reference voltages over process, temperature, and voltage variations.
    Type: Application
    Filed: February 28, 2001
    Publication date: July 5, 2001
    Inventor: Gerald J. Banks
  • Publication number: 20010006478
    Abstract: A multi-bit memory device with a memory cell means for storing input information for an indefinite period of time. The multi-bit memory means stores information in up to Kn memory states (Kn>1). A memory cell programming means and comparator means is also included. The present multi-bit memory device also includes a voltage divider arrangement with pull-up devices in a memory array to provide stable and accurate reference voltages over process, temperature, and voltage variations.
    Type: Application
    Filed: February 28, 2001
    Publication date: July 5, 2001
    Inventor: Gerald J. Banks
  • Patent number: 6246613
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals are dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: October 4, 1999
    Date of Patent: June 12, 2001
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6243321
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell is conducted by applying a plurality of programming signals having different characteristics to the cell. The programming signals include at least a first programming signal which programs the cell by a first increment and a subsequent programming signal which programs the cell by a second increment smaller than the first increment. As the cell is being programmed to a selected state, its programming status is verified independently of reference values bounding the memory states. For this purpose, a signal indicative of the programming status (e.g., the cell's bit line signal) is compared with a reference signal corresponding to the selected state but having a value different from the reference value or values bounding the selected state. The programming operation can thus be controlled without actually reading the memory state of the cell.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: June 5, 2001
    Inventor: Gerald J. Banks
  • Patent number: 6192816
    Abstract: Method and apparatus for forming and joining large and small hems particularly on denim jeans and other types of trousers. An internally folded large hem is formed mechanically and in a highly accurate manner by engaging the end portion of a trouser leg under circumferential tension and folding a projected hem margin into the trouser leg while supporting opposite sides of the trouser leg in a region immediately adjacent to the desired hem fold line. A full depth small hem may be formed by compressing a limited portion of the large hem into a fold, with the raw edge of the fabric positioned substantially at the fold line of the large hem. The configuration of the compressed limited portion is retained until the sewing machine is in position to grip it and commence sewing. A continuous fold former is brought into position before sewing is commenced to complete the small hem folding initiated by the initial compression.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: February 27, 2001
    Assignee: Techstyle Corporation
    Inventors: Herman Rovin, August Feuerbacher, Michael J. Banks
  • Patent number: 6156782
    Abstract: A compound of the formula ##STR1## useful as a parasiticidal agent, are disclosed.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: December 5, 2000
    Assignee: Pfizer Inc
    Inventor: B. J. Banks
  • Patent number: 6139197
    Abstract: A method and system are provided for delivering video from a server to a client over a communication medium with a limited bandwidth. An initial image quality that allows the video to be displayed in real time at the client is determined based on a predetermined frame rate and the limited bandwidth. Video having the initial image quality is transmitted to the client. The client sends to the server a snapshot request that specifies both an image in the video and a destination. In response to the request, the server generates a digital representation of the image that has a higher quality than the initial image quality. The server transmits the snapshot to the specified destination. The specified destination may be a destination other than the client, such as an image processing facility, thereby allowing the client to log off without waiting for delivery of the snapshot.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: October 31, 2000
    Assignee: Seeitfirst.com
    Inventor: Jerry J. Banks
  • Patent number: 6118692
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals are dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: September 12, 2000
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6104640
    Abstract: An electrically alterable, non-volatile memory cell has more than two memory states that can be programmed selectively. Programming of the cell is conducted by applying a plurality of programming signals having different characteristics to the cell. The programming signals include at least a first programming signal which programs the cell by a first increment and a subsequent programming signal which programs the cell by a second increment smaller than the first increment. As the cell is being programmed to a selected state, its programming status is verified independently of reference values bounding the memory states. For this purpose, a signal indicative of the programming status (e.g., the cell's bit line signal) is compared with a reference signal corresponding to the selected state but having a value different from the reference value or values bounding the selected state. The programming operation can thus be controlled without actually reading the memory state of the cell.
    Type: Grant
    Filed: November 18, 1998
    Date of Patent: August 15, 2000
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6069157
    Abstract: A new group of parasiticidal pyrazole derivatives has now been found.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: May 30, 2000
    Assignee: Pfizer Inc.
    Inventor: B. J. Banks
  • Patent number: 6014327
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals are dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: January 11, 2000
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6011716
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals are dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: January 4, 2000
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 6002614
    Abstract: Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals are dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: December 14, 1999
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 5872735
    Abstract: An electrically alterable, non-volatile memory cell has more than 2 memory states that can be programmed selectively. Programming of the cell is conducted by applying a plurality of programming signals having different characteristics to the cell. The programming signals include at least a first programming signal which programs the cell by a first increment and a subsequent programming signal which programs the cell by a second increment smaller than the first increment. As the cell is being programmed to a selected state, its programming status is verified independently of reference values bounding the memory states. For this purpose, a signal indicative of the programming status (e.g., the cell's bit line signal) is compared with a reference signal corresponding to the selected state but having a value different from the reference value or values bounding the selected state. The programming operation can thus be controlled without actually reading the memory state of the cell.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: February 16, 1999
    Assignee: BTG International Inc.
    Inventor: Gerald J. Banks
  • Patent number: 5764571
    Abstract: An electrically alterable, non-volatile multi-bit memory cell has K.sup.n predetermined memory states (K.sup.n >2), where K is a base of a predetermined number system and n is a number of bits stored per cell. Programming of the cell is verified by selecting a reference signal corresponding to the information to be stored and comparing a signal of the cell with the selected reference signal.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: June 9, 1998
    Assignee: BTG USA Inc.
    Inventor: Gerald J. Banks