Patents by Inventor J. Wallace Parce
J. Wallace Parce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7977007Abstract: The present invention discloses nanowires for use in a fuel cell comprising a metal catalyst deposited on a surface of the nanowires. A membrane electrode assembly for a fuel cell is disclosed which generally comprises a proton exchange membrane, an anode electrode, and a cathode electrode, wherein at least one or more of the anode electrode and cathode electrode comprise an interconnected network of the catalyst supported nanowires. Methods are also disclosed for preparing a membrane electrode assembly and fuel cell based upon an interconnected network of nanowires.Type: GrantFiled: September 19, 2008Date of Patent: July 12, 2011Assignee: Nanosys, Inc.Inventors: Chunming Niu, Calvin Y. H. Chow, Stephen A. Empedocles, J. Wallace Parce
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Patent number: 7976646Abstract: Methods for producing electronic grade metal nanostructures having low levels of contaminants are provided. Monolayer arrays, populations, and devices including such electronic grade nanostructures are described. In addition, novel methods and compositions for production of Group 10 metal nanostructures and for production of ruthenium nanostructures are provided, along with methods for recovering nanostructures from suspension.Type: GrantFiled: August 18, 2006Date of Patent: July 12, 2011Assignee: Nanosys, Inc.Inventors: Srikanth Ranganathan, Paul Bernatis, Joel Gamoras, Chao Liu, J. Wallace Parce
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Publication number: 20110165337Abstract: Methods and systems for applying nanowires and electrical devices to surfaces are described. In a first aspect, at least one nanowire is provided proximate to an electrode pair. An electric field is generated by electrodes of the electrode pair to associate the at least one nanowire with the electrodes. The electrode pair is aligned with a region of the destination surface. The at least one nanowire is deposited from the electrode pair to the region. In another aspect, a plurality of electrical devices is provided proximate to an electrode pair. An electric field is generated by electrodes of the electrode pair to associate an electrical device of the plurality of electrical devices with the electrodes. The electrode pair is aligned with a region of the destination surface. The electrical device is deposited from the electrode pair to the region.Type: ApplicationFiled: January 19, 2011Publication date: July 7, 2011Applicant: NANOSYS, INC.Inventors: J. Wallace Parce, James M. Hamilton, Samuel Martin, Erik Freer
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Patent number: 7968474Abstract: The present invention provides methods and systems for nanowire alignment and deposition. Energizing (e.g., an alternating current electric field) is used to align and associate nanowires with electrodes. By modulating the energizing, the nanowires are coupled to the electrodes such that they remain in place during subsequent wash and drying steps. The invention also provides methods for transferring nanowires from one substrate to another in order to prepare various device substrates. The present invention also provides methods for monitoring and controlling the number of nanowires deposited at a particular electrode pair, as well as methods for manipulating nanowires in solution.Type: GrantFiled: November 9, 2007Date of Patent: June 28, 2011Assignees: Nanosys, Inc., Sharp Kabushiki KaishaInventors: Samuel Martin, Xiangfeng Duan, Katsumasa Fujii, James M. Hamilton, Hiroshi Iwata, Francisco Leon, Jeffrey Miller, Tetsu Negishi, Hiroshi Ohki, J. Wallace Parce, Cheri X. Y. Pereira, Paul John Schuele, Akihide Shibata, David P. Stumbo, Yasunobu Okada
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Patent number: 7968273Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.Type: GrantFiled: July 27, 2007Date of Patent: June 28, 2011Assignee: Nanosys, Inc.Inventors: Jian Chen, Xiangfeng Duan, Chao Liu, Madhuri L. Nallabolu, J. Wallace Parce, Srikanth Ranganathan
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Publication number: 20110150695Abstract: Methods for producing electronic grade metal nanostructures having low levels of contaminants are provided. Monolayer arrays, populations, and devices including such electronic grade nanostructures are described. In addition, novel methods and compositions for production of Group 10 metal nanostructures and for production of ruthenium nanostructures are provided, along with methods for recovering nanostructures from suspension.Type: ApplicationFiled: August 18, 2006Publication date: June 23, 2011Applicant: NANOSYS, Inc.Inventors: Srikanth Ranganathan, Paul Bernatis, Joel Gamoras, Chao Liu, J. Wallace Parce
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Publication number: 20110118139Abstract: An array of transportable particle sets is used in a microfluidic device for performing chemical reactions in the microfluidic device. The microfluidic device comprises a main channel and intersecting side channels, the main channel and side channels forming a plurality of intersections. The array of particle sets is disposed in the main channel, and the side channels are coupled to reagents. As the particle sets are transported through the intersections of the main channel and the side channels, reagents are flowed through the side channels into contact with each array member (or selected array members), thereby providing a plurality of chemical reactions in the microfluidic system.Type: ApplicationFiled: January 27, 2011Publication date: May 19, 2011Applicant: CALIPER LIFE SCIENCES, INC.Inventors: Tammy Burd Mehta, Anne R. Kopf-Sill, J. Wallace Parce, Andrea W. Chow, Luc J. Bousse, Michael R. Knapp, Theo T. Nikiforov, Steve Gallagher
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Patent number: 7932511Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: GrantFiled: March 1, 2007Date of Patent: April 26, 2011Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Wallace Parce, Jay L. Goldman
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Patent number: 7892610Abstract: Methods and systems for applying nanowires and electrical devices to surfaces are described. In a first aspect, at least one nanowire is provided proximate to an electrode pair. An electric field is generated by electrodes of the electrode pair to associate the at least one nanowire with the electrodes. The electrode pair is aligned with a region of the destination surface. The at least one nanowire is deposited from the electrode pair to the region. In another aspect, a plurality of electrical devices is provided proximate to an electrode pair. An electric field is generated by electrodes of the electrode pair to associate an electrical device of the plurality of electrical devices with the electrodes. The electrode pair is aligned with a region of the destination surface. The electrical device is deposited from the electrode pair to the region.Type: GrantFiled: May 2, 2008Date of Patent: February 22, 2011Assignee: Nanosys, Inc.Inventors: J. Wallace Parce, James M. Hamilton, Samuel Martin, Erik Freer
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Publication number: 20110034038Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices).Type: ApplicationFiled: June 29, 2010Publication date: February 10, 2011Applicant: NANOSYS, Inc.Inventors: Jian Chen, Karen Chu Cruden, Xiangfeng Duan, Chao Liu, J. Wallace Parce
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Publication number: 20100323500Abstract: The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.Type: ApplicationFiled: August 11, 2010Publication date: December 23, 2010Applicant: NANOSYS, INC.Inventors: Mihai Buretea, Jian Chen, Calvin Chow, Chunming Niu, Yaoling Pan, J. Wallace Parce, Linda T. Romano, David Stumbo
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Patent number: 7851841Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: GrantFiled: June 8, 2007Date of Patent: December 14, 2010Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen A. Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David P. Stumbo, J. Wallace Parce, Jay L. Goldman
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Publication number: 20100285972Abstract: This invention provides novel nanofiber enhanced surface area substrates and structures comprising such substrates, as well as methods and uses for such substrates.Type: ApplicationFiled: October 17, 2007Publication date: November 11, 2010Applicant: Nanosys, Inc.Inventors: Roberto Dubrow, Robert Hugh Daniels, J. Wallace Parce, Matthew Murphy, Jim Hamilton, Erik Scher, Dave Stumbo, Chunming Niu, Linda T. Romano, Jay Goldman, Vijendra Sahi, Jeffery A. Whiteford
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Publication number: 20100276638Abstract: Matrixes doped with semiconductor nanocrystals are provided. In certain embodiments, the semiconductor nanocrystals have a size and composition such that they absorb or emit light at particular wavelengths. The nanocrystals can comprise ligands that allow for mixing with various matrix materials, including polymers, such that a minimal portion of light is scattered by the matrixes. The matrixes are optionally formed from the ligands. The matrixes of the present invention can also be utilized in refractive index matching applications. In other embodiments, semiconductor nanocrystals are embedded within matrixes to form a nanocrystal density gradient, thereby creating an effective refractive index gradient. The matrixes of the present invention can also be used as filters and antireflective coatings on optical devices and as down-converting layers. Processes for producing matrixes comprising semiconductor nanocrystals are also provided.Type: ApplicationFiled: April 29, 2010Publication date: November 4, 2010Applicant: NANOSYS, Inc.Inventors: Mingjun Liu, Robert Dubrow, William P. Freeman, Adrienne Kucma, J. Wallace Parce
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Publication number: 20100233585Abstract: The present invention discloses nanowires for use in a fuel cell comprising a metal catalyst deposited on a surface of the nanowires. A membrane electrode assembly for a fuel cell is disclosed which generally comprises a proton exchange membrane, an anode electrode, and a cathode electrode, wherein at least one or more of the anode electrode and cathode electrode comprise an interconnected network of the catalyst supported nanowires. Methods are also disclosed for preparing a membrane electrode assembly and fuel cell based upon an interconnected network of nanowires.Type: ApplicationFiled: December 20, 2006Publication date: September 16, 2010Applicant: Nanosys, Inc.Inventors: Chunming Niu, Calvin Y.H. Chow, Stephen A. Empedocles, J. Wallace Parce
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Patent number: 7795125Abstract: The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.Type: GrantFiled: November 20, 2008Date of Patent: September 14, 2010Assignee: Nanosys, Inc.Inventors: Mihai A. Buretea, Jian Chen, Calvin Y. H. Chow, Chunming Niu, Yaoling Pan, J. Wallace Parce, Linda T. Romano, David P. Stumbo
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Patent number: 7750235Abstract: Nanocomposite photovoltaic devices are provided that generally include semiconductor nanocrystals as at least a portion of a photoactive layer. Photovoltaic devices and other layered devices that comprise core-shell nanostructures and/or two populations of nanostructures, where the nanostructures are not necessarily part of a nanocomposite, are also features of the invention. Varied architectures for such devices are also provided including flexible and rigid architectures, planar and non-planar architectures and the like, as are systems incorporating such devices, and methods and systems for fabricating such devices. Compositions comprising two populations of nanostructures of different materials are also a feature of the invention.Type: GrantFiled: August 4, 2006Date of Patent: July 6, 2010Assignee: Nanosys, Inc.Inventors: Erik C. Scher, Mihai Buretea, Calvin Y. H. Chow, Stephen A. Empedocles, Andreas P. Meisel, J. Wallace Parce
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Publication number: 20100155786Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.Type: ApplicationFiled: July 27, 2007Publication date: June 24, 2010Applicant: NANOSYS, Inc.Inventors: David L. Heald, Jian Chen, Karen Chu Cruden, Xiangfeng Duan, Chao Liu, Madhuri L. Nallabolu, J. Wallace Parce, Srikanth Ranganathan
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Publication number: 20100155696Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: ApplicationFiled: March 1, 2007Publication date: June 24, 2010Applicant: NANOSYS, INC.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Wallace Parce, Jay L. Goldman
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Patent number: 7741197Abstract: The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.Type: GrantFiled: December 20, 2006Date of Patent: June 22, 2010Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Paul Bernatis, Alice Fischer-Colbrie, James M. Hamilton, Francesco Lemmi, Yaoling Pan, J. Wallace Parce, Cheri X. Y. Pereira, David P. Stumbo