Abstract: Semiconductor module having a first substrate, a second substrate and a spacer distancing the substrates from each other, wherein the spacer is formed by at least one elastic shaped metal body.

Abstract: Semiconductor module including a semiconductor and including a shaped metal body that is electrically contacted by the semiconductor, for forming a contact surface for an electrical conductor, wherein the shaped metal body is bent or folded. A method is also described for establishing electrical contacting of an electrical conductor on a semiconductor, said method including the steps of: fastening a bent or folded shaped metal body of a constant thickness to the semiconductor by means of a first fastening method and then fastening the electrical conductor to the shaped metal body by means of a second fastening method.

Abstract: Sintering tool (10) with a cradle for receiving an electronic subassembly (BG) to be sintered, characterized by at least one support bracket (20), arranged at two locations opposite the cradle, for fixing a protective film (30) covering the electronic subassembly (BG).

Abstract: Sintering tool (10) with a cradle for receiving an electronic subassembly (BG) to be sintered, characterized by at least one support bracket (20), arranged at two locations opposite the cradle, for fixing a protective film (30) covering the electronic subassembly (BG).

Abstract: Tool (10) for the lower die of a sintering device, the tool (10) having a rest (20) for an electronic subassembly (30) comprising a circuit carrier, to be sintered, where the rest (20) is formed from a material with a coefficient of linear expansion that is close to the coefficient of expansion of the circuit carrier of the electronic subassembly (30).

Abstract: Sintering tool (10) with a cradle for receiving an electronic subassembly (BG) to be sintered, characterized by at least one support bracket (20), arranged at two locations opposite the cradle, for fixing a protective film (30) covering the electronic subassembly (BG).

Abstract: One aspect relates to a method for manufacturing a substrate assembly for attachment to an electronic component A substrate is provided with a first side and a second side. A contact material layer is applied to the first side of the substrate. A pre-fixing agent is applied at least to sections of a side of the contact material layer facing away from the substrate.

Abstract: A method for manufacturing semiconductor chips (2, 3) having arranged thereon metallic shaped bodies (6), having the following steps: arranging a plurality of metallic shaped bodies (6) on a processed semiconductor wafer while forming a layer arranged between the semiconductor wafer and the metallic shaped bodies (6), exhibiting a first connection material (4) and a second connection material (5), and processing the first connection material (4) for connecting the metallic shaped bodies (6) to the semiconductor wafer without processing the second connecting material (5), wherein the semiconductor chips (2, 3) are separated either prior to arranging the metallic shaped bodies (6) on the semiconductor wafer or after processing the first connection material (4).

Abstract: Sintering device for sintering at least one electronic assembly, having a lower die and an upper die which is slidable towards the lower die, or a lower die which is slidable towards the upper die. The lower die forms a support for the assembly to be sintered and the upper die includes a receptacle for a pressure pad for exerting pressure directed towards the lower die, and a delimitation wall which laterally surrounds the pressure pad. The delimitation wall having an outer delimitation wall and an inner delimitation wall surrounded by the outer delimitation wall, the inner delimitation wall mounted so as to be slidable towards the outer delimitation wall and so as to be slid in the direction of the lower die such that, following the placing of the inner delimitation wall on the lower die, the pressure pad is displaceable in the direction of the lower die.

Abstract: A method for cohesively connecting a first component of a power semiconductor module to a second component of a power semiconductor module by sintering, the method comprising the steps of: applying a layer of unsintered sinter material to a predetermined bonding surface of the first component, arranging the second component on the surface layer of unsintered sinter material, attaching the second component to the first component by applying pressure and/or temperature on a locally delimited partial area within the predetermined bonding surface, processing the first and/or second component and/or other components of the power semiconductor module, and complete-area sintering of the sinter material.

Abstract: An electronic sandwich structure which has at least a first and a second part to be joined, which are sintered together by means of a sintering layer. The sintering layer is formed as a substantially uninterrupted connecting layer, the density of which varies in such a way that at least one region of higher density and at least one region of lower density alternate with one another. A method for forming a sintering layer of an electronic sandwich structure, in which firstly a sintering material layer is applied substantially continuously to a first part to be joined as a connecting layer, this sintering material layer is subsequently dried and, finally, alternating regions of higher density and of lower density of the connecting layer are produced by sintering the first part to be joined with the sintering layer on a second part to be joined.

Abstract: A description is given of an electronic sandwich structure which has at least a first and a second part to be joined, which are sintered together by means of a sintering layer. The sintering layer is formed as a substantially uninterrupted connecting layer, the density of which varies in such a way that at least one region of higher density and at least one region of lower density alternate with one another. A description is also given of a method for forming a sintering layer of an electronic sandwich structure, in which firstly a sintering material layer is applied substantially continuously to a first part to be joined as a connecting layer, this sintering material layer is subsequently dried and, finally, alternating regions of higher density and of lower density of the connecting layer are produced by sintering the first part to be joined with the sintering layer on a second part to be joined.

Abstract: A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal molded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal molded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal molded body.

Abstract: A method for manufacturing semiconductor chips (2, 3) having arranged thereon metallic shaped bodies (6), having the following steps: arranging a plurality of metallic shaped bodies (6) on a processed semiconductor wafer while forming a layer arranged between the semiconductor wafer and the metallic shaped bodies (6), exhibiting a first connection material (4) and a second connection material (5), and processing the first connection material (4) for connecting the metallic shaped bodies (6) to the semiconductor wafer without processing the second connecting material (5), wherein the semiconductor chips (2, 3) are separated either prior to arranging the metallic shaped bodies (6) on the semiconductor wafer or after processing the first connection material (4).

Abstract: A description is given of a power semiconductor module 10 which can be transferred from a normal operating mode to an explosion-free robust short-circuit failure mode. Said power semiconductor module 10 comprises a power semiconductor 1 having metallizations 3 which form potential areas and are separated by insulations and passivations on the top side 2 of said power semiconductor. Furthermore, an electrically conductive connecting layer is provided, on which at least one metal shaped body 4 which has a low lateral electrical resistance and is significantly thicker than the connecting layer is arranged, said at least one metal shaped body being applied by sintering of the connecting layer such that said metal shaped body is cohesively connected to the respective potential area.

Abstract: A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal moulded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal moulded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal moulded body.

Abstract: A method for cohesively connecting a first component of a power semiconductor module to a second component of a power semiconductor module by sintering, the method comprising the steps of: applying a layer of unsintered sinter material to a predetermined bonding surface of the first component, arranging the second component on the surface layer of unsintered sinter material, attaching the second component to the first component by applying pressure and/or temperature on a locally delimited partial area within the predetermined bonding surface, processing the first and/or second component and/or other components of the power semiconductor module, and complete-area sintering of the sinter material.

Abstract: The invention relates to a method for connecting a power semi-conductor chip having upper-sided potential surfaces to thick wires or strips, consisting of the following steps: Providing a metal molded body corresponding to the shape of the upper-sided potential surfaces, applying a connecting layer to the upper-sided potential surfaces or to the metal molded bodies, and applying the metal molded bodies and adding a material fit, electrically conductive compound to the potential surfaces prior to the joining of the thick wire bonds to the non-added upper side of the molded body.

Abstract: Sintering device (10) for sintering at least one electronic assembly (BG), having a lower die (20) and an upper die (30) which is slidable towards the lower die (20), or a lower die (20) which is slidable towards the upper die (30), wherein the lower die (20) forms a support for the assembly (BG) to be sintered and the upper die (30) comprises a receptacle which receives a pressure pad (32) for exerting pressure directed towards the lower die (20) and which comprises a delimitation wall (34) which laterally surrounds the pressure pad (32), and wherein the delimitation wall (34) has an outer delimitation wall (34a) and an inner delimitation wall (34b) which is surrounded in an adjacent manner by the outer delimitation wall (34a), and wherein the inner delimitation wall (34b) is mounted so as to be slidable towards the outer delimitation wall (34a) and, when pressure in the direction of the upper die (30) is exerted on the pressure pad (32), is mounted so as to be slid in the direction of the lower die (20), wh

Abstract: Tool (10) for the lower die of a sintering device, the tool (10) having a rest (20) for an electronic subassembly (30) comprising a circuit carrier, to be sintered, where the rest (20) is formed from a material with a coefficient of linear expansion that is close to the coefficient of expansion of the circuit carrier of the electronic subassembly (30).