Patents by Inventor Jack A. Lewis

Jack A. Lewis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190072585
    Abstract: A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.
    Type: Application
    Filed: November 6, 2018
    Publication date: March 7, 2019
    Inventors: Lynwood Adams, Jack Lewis
  • Patent number: 10156586
    Abstract: A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: December 18, 2018
    Assignee: Modus Test, LLC
    Inventors: Lynwood Adams, Jack Lewis
  • Publication number: 20180120352
    Abstract: A testing system for semiconductor chips having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. The DUT PCB is quickly and easily removed and replaced by moving the locking posts between an engaged position and a disengaged position. In this way, a single testing system can be used to test a great variety of semiconductor chips thereby reducing capital equipment costs and space needed in cleanrooms.
    Type: Application
    Filed: December 22, 2017
    Publication date: May 3, 2018
    Inventors: Lynwood Adams, Jack Lewis
  • Patent number: 9885737
    Abstract: A testing system for semiconductor chips having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. The DUT PCB is quickly and easily removed and replaced by moving the locking posts between an engaged position and a disengaged position. In this way, a single testing system can be used to test a great variety of semiconductor chips thereby reducing capital equipment costs and space needed in cleanrooms.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: February 6, 2018
    Assignee: Modus Test Automation, LLC
    Inventors: Lynwood Adams, Jack Lewis
  • Publication number: 20170192046
    Abstract: A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.
    Type: Application
    Filed: March 17, 2017
    Publication date: July 6, 2017
    Inventors: Lynwood Adams, Jack Lewis
  • Publication number: 20160209443
    Abstract: A testing system for semiconductor chips having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. The DUT PCB is quickly and easily removed and replaced by moving the locking posts between an engaged position and a disengaged position. In this way, a single testing system can be used to test a great variety of semiconductor chips thereby reducing capital equipment costs and space needed in cleanrooms.
    Type: Application
    Filed: January 14, 2016
    Publication date: July 21, 2016
    Inventors: Lynwood Adams, Jack Lewis
  • Publication number: 20160124021
    Abstract: An improved package device simulator for the testing of testing sockets, the package device simulator being formed of a first layer of non-conductive rigid substrate with a second layer formed of a plurality of electrically conductive traces being added thereto. A third layer of non-conductive rigid substrate is adhered to the first layer with the second layer being sealed there between. The third layer having a plurality of openings therein, wherein the openings align with and expose a portion of the electrically conductive traces of the second layer. Conductive binding material and contact balls are added to the openings and the chip is cured thereby fusing the contact balls with the exposed portions of the traces. Next, the exposed surfaces are coated with a hardening conductive material, such as layers of Nickel and/or Gold. In this way an improved package device simulator is formed that is durable, easier to manufacture and less expensive than a solid metallic package device simulator.
    Type: Application
    Filed: October 29, 2015
    Publication date: May 5, 2016
    Inventors: Lynwood Adams, Bruce Rogers, Jack Lewis, Tim Conner, Jay Williams, Mike Young, Dawn Ritz
  • Patent number: 5957664
    Abstract: A gas pulsation and noise reduction system for positive displacement blowers and compressors. A resonator is placed in one or both of the inlet and outlet conduits of the blower or compressor. The resonator is sized to damp out gas pulsations by providing a reflected wave 180.degree. out of phase with the gas pulsation in the associated conduit. Multiple resonators can be used in one or both conduits to dampen gas pulsations of different frequencies.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: September 28, 1999
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Jack Lewis Stolz, Mark Allen Story
  • Patent number: 5068105
    Abstract: A fungal biocontrol preparation for control or prevention of plant fungal diseases comprises sporulated fungal biomass, a carrier and acid. The carrier preferably is vermiculite. The biocontrol preparation is resistant to bacterial proliferation in storage and handling and is effective in controlling damping-off diseases caused by soilborne fungal pathogens.
    Type: Grant
    Filed: March 13, 1989
    Date of Patent: November 26, 1991
    Assignees: W. R. Grace & Co.-Conn., The United States of America as represented by the Secretary of Agriculture
    Inventors: Jack A. Lewis, Douglas Lumsden, George Papavizas, Martha D. Hollenbeck, James F. Walter
  • Patent number: D454704
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: March 26, 2002
    Assignee: La-Z-Boy Incorporated
    Inventors: Jack Lewis, Ron Randen
  • Patent number: D459095
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: June 25, 2002
    Assignee: La-Z-Boy Incorporated
    Inventors: Jack Lewis, Wendell Massengill
  • Patent number: D471021
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: March 4, 2003
    Assignee: La-Z-Boy Incorporated
    Inventors: Jack Lewis, Wendell Massengill
  • Patent number: D474901
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: May 27, 2003
    Assignee: La-Z-Boy Incorporated
    Inventor: Jack Lewis
  • Patent number: D474902
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: May 27, 2003
    Assignee: La-Z-Boy Incorporated
    Inventor: Jack Lewis
  • Patent number: D474903
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: May 27, 2003
    Assignee: La-Z-Boy Incorporated
    Inventors: Jack Lewis, Paula M. Hoyas
  • Patent number: D476491
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: July 1, 2003
    Assignee: La-Z-Boy Incorporated
    Inventors: Jack Lewis, Ronald W. Randen, Jr.
  • Patent number: D481551
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: November 4, 2003
    Assignee: La-Z-Boy Incorporated
    Inventors: Jack Lewis, Roger Doolittle
  • Patent number: D751433
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: March 15, 2016
    Assignee: Modus Test Automation, LLC
    Inventors: Lynwood Adams, Jack Lewis
  • Patent number: D821337
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: June 26, 2018
    Assignee: MODUS TEST AUTOMATION, LLC.
    Inventors: Lynwood Dale Adams, Jack Lewis
  • Patent number: D821338
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: June 26, 2018
    Assignee: MODUS TEST AUTOMATION, LLC.
    Inventors: Lynwood Dale Adams, Jack Lewis