Abstract: An input device is shared between a first remote desktop having a first display image, which is displayed on a first display of a first client device, and a second remote desktop having a second display image, which is displayed on a second display of a second client device. Upon detecting that an input pointer of the input device currently displayed within the first display image on the first display, is moved across an edge of the first remote desktop that corresponds to a virtual boundary between the first remote desktop and the second remote desktop, instructions are issued to a first remote computing device that is hosting the first remote desktop to discontinue receiving inputs made with the input device and a second remote computing device that is hosting the second remote desktop to begin receiving inputs made with the input device.

Abstract: An integrated circuit includes first through fourth devices positioned over one or more substrates, a first radio frequency interconnect (RFI) including a first transmitter included in the first device, a first receiver included in the second device, and a first guided transmission medium coupled to each of the first transmitter and the first receiver, a second RFI including a second transmitter included in the first device, a second receiver included in the third device, and a second guided transmission medium coupled to each of the second transmitter and the second receiver, and a third RFI including a third transmitter included in the first device, a third receiver included in the fourth device, and the second guided transmission medium coupled to each of the third transmitter and the third receiver.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a semiconductor substrate having a first semiconductor material layer separated from a second semiconductor material layer by an insulating layer. A source region and a drain region are disposed in the first semiconductor material layer and spaced apart. A gate electrode is disposed over the first semiconductor material layer between the source region and the drain region. A first doped region having a first doping type is disposed in the second semiconductor material layer, where the gate electrode directly overlies the first doped region. A second doped region having a second doping type different than the first doping type is disposed in the second semiconductor material layer, where the second doped region extends beneath the first doped region and contacts opposing sides of the first doped region.

Abstract: A hardware accelerator can store, in multiple memory storage areas in one or more memories on the accelerator, input data for each processing time step of multiple processing time steps for processing sequential inputs to a machine learning model. For each processing time step, the following is performed. The accelerator can access a current value of a counter stored in a register within the accelerator to identify the processing time step. The accelerator can determine, based on the current value of the counter, one or more memory storage areas that store the input data for the processing time step. The accelerator can facilitate access of the input data for the processing time step from the one or more memory storage areas to at least one processor coupled to the one or more memory storage areas. The accelerator can increment the current value of the counter stored in the register.

Abstract: A helmet comprising first and second parts and a connector connecting the first and second parts of the helmet, the connector comprising: a first plate; a first anchor point on one side of the first plate, configured to be connected to the first part; a second plate located on an opposite side of the first plate from the first anchor point; a second anchor point on an opposite side of the second plate from the first plate, configured to be connected to the second part; a low friction interface provided between opposing surfaces of the first and second plates; and a cuff of deformable material provided around the first and second plates, and configured to at least partially cover the side of the first plate on which the first anchor point is located and to at least partially cover the side of the second plate on which the second anchor point is located.

Abstract: An integrated circuit includes a first through fourth devices positioned over a substrate, the first device including first through third transceivers, the second device including a fourth transceiver, the third device including a fifth transceiver, and the fourth device including a sixth transceiver. A first radio frequency interconnect (RFI) includes the first transceiver coupled to the fourth transceiver through a first guided transmission medium, a second RFI includes the second transceiver coupled to the fifth transceiver through a second guided transmission medium, and a third RFI includes the third transceiver coupled to the sixth transceiver by the second guided transmission medium.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a semiconductor substrate having a first semiconductor material layer separated from a second semiconductor material layer by an insulating layer. A source region and a drain region are disposed in the first semiconductor material layer and spaced apart. A gate electrode is disposed over the first semiconductor material layer between the source region and the drain region. A first doped region having a first doping type is disposed in the second semiconductor material layer, where the gate electrode directly overlies the first doped region. A second doped region having a second doping type different than the first doping type is disposed in the second semiconductor material layer, where the second doped region extends beneath the first doped region and contacts opposing sides of the first doped region.

Abstract: A method includes: providing a cell of a first group that supplies a first potential from a backside of a substrate, multiple cells of a second group, and two cells of a third group that supply a second potential from the backside; determining a distance in a row direction between the cell of the first group and each of the two cells of the third group; determining a placement of the cell of the first group, the two cells of the third group, and each of the cells of the second group; and counting a number of pins of the cells of the second group. The cell of the first group is located between the two cells of the third group. Each of the cells of the second group is located between the two cells of the third group.

Abstract: A true random metastable flip-flop (TRMFF) compiler generates an electrical architecture for a TRMFF chain. The compiler selects components for the TRMFF chain from a library of standard cells and logically connects these components in accordance with a primitive polynomial to generate the electrical architecture. The TRMFF chain provides a sequence of random numbers from one or more physical processes in accordance with the primitive polynomial. During operation, one or more microscopic phenomena inside and/or outside of the TRMFF chain can cause one or more low-level, statistically random entropy noise signals to be present within the TRMFF chain. The TRMFF chain advantageously utilizes the one or more low-level, statistically random entropy noise signals to provide the sequence of random numbers.

Abstract: Systems and methods for remote display resource management can allow a remote display to be dynamically modified according to user eye movements. A user device can receive graphical data for a remote display and present the remote display on a local display. A remote display module (RD module) can detect dynamic content in the graphical data. The RD module can monitor eye movements of a user using an eye tracker device to determine when a user is not looking at the dynamic content. When a user looks away from the dynamic content for more than an allowed amount of time, the RD module can send instructions to a server to reduce the quality of the dynamic content in the remote display. The RD module can send instructions to restore the quality of the dynamic content after determining that the user is looking at the dynamic content.

Abstract: Methods and systems, including computer programs encoded on a computer storage medium. In one aspect, a method includes obtaining data specifying one or more neural networks to be deployed on a neural network hardware accelerator, each of the one or more neural networks having a respective set of parameters, and the neural network hardware accelerator having one or more memories having a memory capacity; determining a maximum amount of the memory capacity that will be in use at any one time during a processing of any of the one or more neural networks by the neural network hardware accelerator; identifying a subset of the parameters of the one or more neural networks that consumes an amount of memory that is less than a difference between the memory capacity and the determined maximum amount of the memory capacity; and storing the identified subset of the parameters.

Abstract: An integrated circuit includes a device, a first interconnect structure disposed above the device and a second interconnect structure positioned below the device. The first interconnect structure includes multiple frontside metal layers. The second interconnect structure includes multiple backside metal layers, where each backside metal layer includes metal conductors routed according to diagonal routing. In some embodiments, a backside interconnect structure can include another backside metal layer that includes metal conductors routed according to mixed-Manhattan-diagonal routing. A variety of techniques can be used to route signals between metal conductors in the backside interconnect structure and cells on one or more frontside metal layers.

Abstract: A semiconductor device comprising a plurality of cells comprising cells of a first group, a second group and a third group is provided. The cell of the first group comprises a first power supply wiring for supplying a first potential, is located between the two cells of the third group and separated therefrom in a row direction by a distance, and supplies the first potential to the cells of the second group via a wiring on a front-side of the substrate. At least one of the two cells of the third group comprises a second power supply wiring for supplying a second potential having a polarity is opposite the first potential or being a ground. A third power supply wiring on a backside of a substrate supplies the first potential. The first power supply wiring comprises a via coupled to the third power supply wiring.

Abstract: Disclosed embodiments herein relate to an integrated circuit including power switches with active regions connected to form a contiguous region. In one aspect, the integrated circuit includes a first layer including a first metal rail extending in a first direction. In one aspect, the integrated circuit includes a second layer above the first layer along a second direction perpendicular to the first direction. The second layer may include active regions for power switches. In one aspect, the active regions of the power switches are connected to form a contiguous region extending in the first direction. The first metal rail may be electrically coupled to the active regions through via contacts. In one aspect, the integrated circuit includes a third layer above the second layer along the second direction. The third layer may include a second metal rail electrically coupled to some of the power switches through additional via contacts.

Abstract: A system includes a substrate having a first side and a second side opposite the first side, a cell on the substrate having a first pin on either the first side or the second side, and a second pin on the second side, a first signal connected to the first pin, and a second signal connected to the second pin.

Abstract: The disclosure provides for transitioning application windows between local and remote desktops. Example implementations include opening a first file with a first application to generate a first application window on a first desktop window on a user display; based at least on a trigger event for transitioning the first application window from the first desktop window to a second desktop window, determining whether a second application is available for the second desktop window to produce a version of the first application window; and based at least on the second application being available: transferring the first file across a network to become a second file; and opening the second file with the second application to generate a second application window on the second desktop window, the second application window replacing the first application window on the user display. The transition may go either direction.

Abstract: A system includes a substrate having a first side and a second side opposite the first side, a cell on the substrate having a first pin on either the first side or the second side, and a second pin on the second side, a first signal connected to the first pin, and a second signal connected to the second pin.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a semiconductor substrate having a first semiconductor material layer separated from a second semiconductor material layer by an insulating layer. A first access transistor is arranged on the first semiconductor material layer, where the first access transistor has a pair of first source/drain regions having a first doping type. A second access transistor is arranged on the first semiconductor material layer, where the second access transistor has a pair of second source/drain regions having a second doping type opposite the first doping type. A resistive memory cell having a bottom electrode and an upper electrode is disposed over the semiconductor substrate, where one of the first source/drain regions and one of the second source/drain regions are electrically coupled to the bottom electrode.

Abstract: A clock distribution system includes a clock mesh structure which has a plurality of first metal patterns extending along a first axis, a plurality of second metal patterns extending along a second axis, a plurality of third metal patterns extending along a third axis. The plurality of first metal patterns, the plurality of second metal patterns, and the plurality of third metal patterns are electrically coupled with each other. The second axis is transverse to the first axis. The third axis is oblique to both the first axis and the second axis.