Abstract: The computer system is comprised of three main components: the core processing trait, the software rules/protocols, and the system architecture. The complete system consists of a number of distributed core processing units distributed in a hierarchical architecture. Core processing units at the top of the hierarchy and at all intermediate levels perform supervisory control, monitoring, and message passing functions. Core processors at terminating points in the hierarchical structure: control and/or monitor devices, machines, and instruments; or execute applications and perform computational functions. Because of the inherent flexibility of the computer system, it can be structured to accomplish any computational task including industrial control and monitoring, data acquisition, instrument control, embedded control, process control and monitoring, general purpose computing and virtually any other computing task.

Abstract: An impact resistant device is provided comprising a flexible support matrix and a plurality of energy absorbing elements operatively connected to the support matrix, each element comprising at least one ceramic material and at least one strain rate sensitive material. The impact resistant device can be worn as body armor to protect the wearer from high velocity projectiles.

Abstract: A method and system for storing and modifying register transfer language (RTL) described logic types. Upon a declaration of a signal interconnect, a language extension of a register transfer language is defined for the signal interconnect based on the signal interconnect's type. The language extensions allow different signal interconnect types, such as those used with field programmable gate arrays (FPGA) and standard cells, to be stored in a same file array hierarchy. This storage facilitates changing logic types, thus ultimately resulting in an integrated circuit (IC) that is either smaller (using more standard cells) or more flexible (using more FPGA cells). The transition from one RTL type to another is performed within the physical design cycle, in which wiring, timing and placement of components (information) is performed before masking out the final chip design.

Abstract: An exemplary polarization controller includes a first optical element having a first optical axis and configured to receive light having a first phase, a second optical element having a second optical axis and configured to emit the light having a second phase, and a third element having a third optical axis. At least a portion of the third element is interstitial to the first element and the second element. The exemplary controller also includes at least two drivers, both of which can operate in accordance with an exemplary method of present invention.

Abstract: A bone substitute for use in impact testing of a structure simulating the human body which includes a member fabricated from epoxy resin and having a lengthwise dimension, and a fiberglass sheath embedded in an outer circumferential portion of the member, the sheath having glass fibers oriented along the length of the member.

Abstract: A structure that includes a plurality of cells of a cured resinous material. Each cell is joined to at least one other cell.

Abstract: A method and system for storing and modifying register transfer language (RTL) described logic types. Upon a declaration of a signal interconnect, a language extension of a register transfer language is defined for the signal interconnect based on the signal interconnect“s type. The language extensions allow different signal interconnect types, such as those used with field programmable gate arrays (FPGA) and standard cells, to be stored in a same file array hierarchy. This storage facilitates changing logic types, thus ultimately resulting in an integrated circuit (IC) that is either smaller (using more standard cells) or more flexible (using more FPGA cells). The transition from one RTL type to another is performed within the physical design cycle, in which wiring, timing and placement of components (information) is performed before masking out the final chip design.

Abstract: In a first aspect, a method is provided for conserving power in a processing integrated circuit. The method includes the steps of (1) calculating power consumption for executing an instruction and data corresponding to the instruction; and (2) executing the instruction if such execution does not exceed a predetermined power level. In a second aspect, a method is provided for conserving power in a processing integrated circuit employing a plurality of execution units. The method includes the steps of (1) comparing a total power to be consumed by the processing integrated circuit to a power budget for the processing integrated circuit; and (2) if the total power exceeds the power budget, freezing execution of an instruction by one of the plurality of execution units so as to allow execution of the instruction to continue at a later time from where execution was frozen. Numerous other aspects are provided, as are systems and apparatus.

Abstract: A data processing system includes a central processing unit (CPU) in communication with a system memory. Within the system memory, there is stored legacy code that does not utilize the full features of the CPU. The data processing system also includes a code-optimizing coprocessor in communication with the CPU and the system memory. Control logic within the code-optimizing coprocessor causes the code-optimizing coprocessor to generate optimized code from the legacy code at the same time the CPU executes the legacy code, such that the optimized code is tailored according to the CPU. After the code-optimizing coprocessor has generated at least some optimized code, the code-optimizing coprocessor causes the CPU to automatically utilize at least some optimized code in lieu of at least some of the legacy code.

Abstract: This invention relates to the application of fluorinated urethane compositions to stone in order to protect the stone from the deleterious effects of water and pollution.

Abstract: The present invention constitutes a deterministic real time hierarchical distributed computer system. This invention constitutes a computer system using specific computer hardware and computer software designs combined in a hierarchical structure that is inherently deterministic and operates in real time with processing distributed among a number of different processors. In addition to real time deterministic operation, the other benefits of the invention are: ease of design, use, and maintenance; transparency; scalability; design re-usability; and inherent design longevity.

Abstract: Systems and methods for selectively providing stock shares that entitle rights to use a property. A management entity oversees and selectively schedules use of the property according to individual stock shares. In one implementation, the use is the dividend provided to the stockholder. In another implementation the use schedule is created by receiving use requests from stockholders and scheduling use of the property according to which stockholder first requested the property for the scheduled use period. In another implementation, a lottery system is used to assign use dates or periods to the individual shareholders. In yet another implementation, preference to use dates/periods is made based on the number of stock shares or the type of stock shares (e.g., shares of a preferred stock) owned by the stockholder. Stock shares are exchanged at a public or electronic exchange.

Abstract: In a first aspect, a method is provided for conserving power in a processing integrated circuit. The method includes the steps of (1) calculating power consumption for executing an instruction and data corresponding to the instruction; and (2) executing the instruction if such execution does not exceed a predetermined power level. In a second aspect, a method is provided for conserving power in a processing integrated circuit employing a plurality of execution units. The method includes the steps of (1) comparing a total power to be consumed by the processing integrated circuit to a power budget for the processing integrated circuit; and (2) if the total power exceeds the power budget, freezing execution of an instruction by one of the plurality of execution units so as to allow execution of the instruction to continue at a later time from where execution was frozen. Numerous other aspects are provided, as are systems and apparatus.

Abstract: This invention relates to the application of fluorinated urethane compositions to stone in order to protect the stone from the deleterious effects of water and pollution.

Abstract: A data processing system includes a central processing unit (CPU) in communication with a system memory. Within the system memory, there is stored legacy code that does not utilize the full features of the CPU. The data processing system also includes a code-optimizing coprocessor in communication with the CPU and the system memory. Control logic within the code-optimizing coprocessor causes the code-optimizing coprocessor to generate optimized code from the legacy code at the same time the CPU executes the legacy code, such that the optimized code is tailored according to the CPU. After the code-optimizing coprocessor has generated at least some optimized code, the code-optimizing coprocessor causes the CPU to automatically utilize at least some optimized code in lieu of at least some of the legacy code.

Abstract: In a lead-acid battery with stress applied perpendicular to the plane of the electrodes, at least one of the elements chosen from among the positive electrode, the negative electrode and the electrolyte has been modified so that the quantity of sulfuric acid in the positive electrode and/or negative electrode represents at least 0.20 mole of H2SO4 per mole of active material in the charged state.

Abstract: A portable, rechargeable device for boost-charging a discharged target battery is equipped with current sensing and regulation circuitry. The device may be used, for example, for boost-charging through a cigarette lighter socket or directly. Such circuitry permits very rapid charging using voltages greater than the nominal voltage of the target battery without blowing a fuse of the cigarette lighter socket or damaging sensitive onboard electronics.

Abstract: A modular hyperbaric chamber for treatment of at least one patient that includes at least one spacer module having a first flange and a second flange. The spacer module may be formed from a plurality of sections, with each section including opposing lip portions to form air-tight junctions. A first half cylinder module includes a first peripheral contact edge for releasable sealed connection to the first flange of the spacer module. Similarly, a second half cylinder module includes a second peripheral contact edge, for releasable sealed connection to the second flange of the spacer module. An access door, formed in at least one of the half cylinder modules provides access to the interior of the chamber. The overall size of a hyperbaric chamber may be conveniently increased by inserting additional spacer modules between the half cylinder modules.

Abstract: Fluorinated diesters useful for imparting repellency of low surface tension fluids to thermoplastic polymers of formulae Rf—O—C(O)—(CH2)n—C(O)—O—R1; Rf—O—C(O)—CH2—CH(R2)—C(O)—O—Rf; a mixture of Rf—O—C(O)—(CH2)n—C(O)—O—R1, Rf—O—C(O)—(CH2)n—C(O)—Rf, and R1—O—C(O)—(CH2)n—C(O)—O—R1; and [F(CF2)xCH2CH2—S—CH2]2—C—[CH2—O—C(O)—C17H35]2; wherein Rf is F(CF2)x—(CH2)m wherein x is 4 to 20 and m is 2 to 6, or F(CF2)x—SO2N(R3)—R4 wherein x is 4 to 20; R1 is a saturated aliphatic hydrocarbon with an average carbon chain length of 12 to 66 carbons; R2 is a saturated or unsaturated hydrocarbon with 1-20 carbon atoms; R3 is an alkyl radical having 1 to 4 carbon atoms; R4 is an alkylene radical having 1 to 12 carbon atoms; n is 1 to 20, and x is 4 to 20 are disclose

Abstract: Fluorinated diesters useful for imparting repellency of low surface tension fluids to thermoplastic polymers of formulaeR.sub.f --O--C(O)--(CH.sub.2).sub.n --C(O)--O--R.sub.1 ;R.sub.f --O--C(O)--CH.sub.2 --CH(R.sub.2)--C(O)--O--R.sub.f ;a mixture of R.sub.f --O--C(O)--(CH.sub.2).sub.n --C(O)--O--R.sub.1,R.sub.f --O--C(O)--(CH.sub.2).sub.n --C(O)--R.sub.f, and R.sub.1 --O--C(O)--(CH.sub.2).sub.n --C(O)--O--R.sub.1 ;and [F(CF.sub.2).sub.x CH.sub.2 CH.sub.2 --S--CH.sub.2 ].sub.2 --C--[CH.sub.2 --O--C(O)--C.sub.17 H.sub.35 ].sub.2 ;wherein R.sub.f is F(CF.sub.2).sub.x --(CH.sub.2).sub.m wherein x is 4 to 20 and m is 2 to 6, or F(CF.sub.2).sub.x --SO.sub.2 N(R.sub.3)--R.sub.4 wherein x is 4 to 20; R.sub.1 is a saturated aliphatic hydrocarbon with an average carbon chain length of 12 to 66 carbons; R.sub.2 is a saturated or unsaturated hydrocarbon with 1-20 carbon atoms; R.sub.3 is an alkyl radical having 1 to 4 carbon atoms; R.sub.