Patents by Inventor Jade M. Kizer

Jade M. Kizer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory controller for strobe-based memory systems
    Patent number: 11842760
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: December 12, 2023
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20230105557
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: September 15, 2022
    Publication date: April 6, 2023
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • HIGH-SPEED SIGNALING SYSTEMS AND METHODS WITH ADAPTABLE, CONTINUOUS-TIME EQUALIZATION
    Publication number: 20230082649
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Application
    Filed: September 11, 2022
    Publication date: March 16, 2023
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • High-speed signaling systems and methods with adaptable, continuous-time equalization
    Patent number: 11469927
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: October 11, 2022
    Assignee: Rambus Inc.
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • Memory controller for strobe-based memory systems
    Patent number: 11450374
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: September 20, 2022
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • HIGH-SPEED SIGNALING SYSTEMS AND METHODS WITH ADAPTABLE, CONTINUOUS-TIME EQUALIZATION
    Publication number: 20210152402
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Application
    Filed: December 3, 2020
    Publication date: May 20, 2021
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20210134347
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: November 19, 2020
    Publication date: May 6, 2021
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • High-speed signaling systems and methods with adaptable, continuous-time equalization
    Patent number: 10938605
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: March 2, 2021
    Assignee: Rambus Inc.
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • Memory controller for strobe-based memory systems
    Patent number: 10861532
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: December 8, 2020
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • HIGH-SPEED SIGNALING SYSTEMS AND METHODS WITH ADAPTABLE, CONTINUOUS-TIME EQUALIZATION
    Publication number: 20200228376
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 16, 2020
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20200211619
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: December 23, 2019
    Publication date: July 2, 2020
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • High-speed signaling systems and methods with adaptable, continuous-time equalization
    Patent number: 10560291
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: February 11, 2020
    Assignee: Rambus Inc.
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • Memory controller for strobe-based memory systems
    Patent number: 10529408
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: January 7, 2020
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20190362766
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: June 7, 2019
    Publication date: November 28, 2019
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • Memory controller for strobe-based memory systems
    Patent number: 10332583
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: June 25, 2019
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • HIGH-SPEED SIGNALING SYSTEMS AND METHODS WITH ADAPTABLE, CONTINUOUS-TIME EQUALIZATION
    Publication number: 20190173696
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Application
    Filed: November 7, 2018
    Publication date: June 6, 2019
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • High-speed signaling systems and methods with adaptable, continuous-time equalization
    Patent number: 10135646
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: November 20, 2018
    Assignee: Rambus Inc.
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS
    Publication number: 20180277193
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Application
    Filed: February 15, 2018
    Publication date: September 27, 2018
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau
  • HIGH-SPEED SIGNALING SYSTEMS AND METHODS WITH ADAPTABLE, CONTINUOUS-TIME EQUALIZATION
    Publication number: 20180152327
    Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 31, 2018
    Inventors: Hae-Chang Lee, Brian S. Leibowitz, Jade M. Kizer, Thomas H. Greer, Akash Bansal
  • Memory controller for strobe-based memory systems
    Patent number: 9905286
    Abstract: An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: February 27, 2018
    Assignee: Rambus Inc.
    Inventors: Jade M. Kizer, Sivakumar Doraiswamy, Benedict Lau