Abstract: An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a buffer layer on a substrate; forming a polycrystalline-silicon active layer on the buffer layer, the said active layer having an island shape; forming a gate insulation layer on the buffer layer to cover the polycrystalline-silicon active layer; forming a first metal layer on the gate insulation layer; forming a second metal layer on the first metal layer; patterning the first and second metal layer to form a gate electrode, a gate line and a gate shorting bar; forming a source contact area and a drain contact area at both sides of the polycrystalline-silicon active layer; forming an interlayer insulator on the gate insulation layer to cover the patterned first and second metal layers; patterning the interlayer insulator and the gate insulation layer so as to form a first contact hole to the source contact area and the second contact hole to a drain contact area, patterning a portion of the interlayer insulat

Abstract: A shift register having a built-in level shifter includes a buffer outputting a shift pulse using a first clock signal and a first supply voltage via voltages at first and second nodes; a first controller controlling the voltage of the first node via the start pulse and the second node; and a second controller controlling the second node voltage using the first and second supply voltage via the start pulse and the second clock signal. The level shifter includes a third controller forming a current path between third supply voltage input line and first supply voltage input line controlling a third node using the first supply voltage and a third supply voltage via the voltage of the second node and two of first to fourth clock signals; and an output part outputting the level-shifted shift pulse using the first and third supply voltage via the voltage at the third node.

Abstract: A transflective liquid crystal display includes gate and data lines perpendicular to each other and defining a plurality of unit pixels. Each unit pixel includes a plurality of sub-pixel regions, which each have a transmissive portions and a reflective portion. The transmissive portions are gathered together within each unit pixel at corners of the sub-pixel regions opposing corners in which thin film transistors near the crossings of the gate and data lines are disposed. A passivation layer covering the thin film transistors and the gate and data lines has an opening that corresponds to the transmissive portions in the unit pixel. A reflector is formed over the passivation layer in each sub-pixel region and corresponds in position to the reflective portion. A pixel electrode in each sub-pixel region contacts the thin film transistor through a contact hole in the passivation layer.

Abstract: A transflective liquid crystal display device includes a first substrate including transmissive and reflective pixels. Gate and data lines on the first substrate cross each other to define a pixel region, with a thin film transistor at each crossing. The transmissive and reflective pixels correspond to respective pixel regions. A first passivation layer covers the thin film transistor and has a transmissive hole in the transmissive pixel. A first reflector is disposed on the first passivation layer in the reflective pixel. A second passivation layer is disposed on the first reflector and in the transmissive hole. A pixel electrode on the second passivation layer is connected to the thin film transistor. A second substrate opposing the first substrate has a color filter layer on an inner surface thereof. The color filter layer contains R, G and B sub color filters, which each correspond to a pixel region.

Abstract: A shift register includes stages shifting an input signal with phase-delayed control signals and first and second supply voltages, and for applying shifted input signals as output signals and as input signals of succeeding stages. Each of the stages includes a first controller selectively applying an input signal and a first supply voltage to a first node between first to third transistors; a second controller selectively applying the first and second supply voltages to a second node between fourth and fifth transistors; and an output buffer selectively applying a predetermined control signal and the first supply voltage as an output signal to a stage output line between sixth and seventh transistors, wherein the fifth transistor may be turned on to sustain a voltage present at the second node equal to the first supply voltage when the fourth transistor is turned off.

Abstract: A liquid crystal display panel includes: a display part having pixels; a non-display part having driving circuits for driving the display part; a control line formed in the non-drive display part for applying a drive signal to signal lines of the display part; a scribed line formed in an area of the non-display part crossing the control line; and a shorting bar that runs along the scribed line and bypasses around an area in which the scribed line crosses the control line.

Abstract: An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a buffer layer on a substrate; forming a polycrystalline-silicon active layer on the buffer layer, the said active layer having an island shape; forming a gate insulation layer on the buffer layer to cover the polycrystalline-silicon active layer; forming a first metal layer on the gate insulation layer; forming a second metal layer on the first metal layer; patterning the first and second metal layer to form a gate electrode, a gate line and a gate shorting bar; forming a source contact area and a drain contact area at both sides of the polycrystalline-silicon active layer; forming an interlayer insulator on the gate insulation layer to cover the patterned first and second metal layers; patterning the interlayer insulator and the gate insulation layer so as to form a first contact hole to the source contact area and the second contact hole to a drain contact area, patterning a portion of the interlayer insulat

Abstract: A flat panel display device for a small module application is disclosed in the present invention.

Abstract: A bi-directional driving circuit of a flat panel display device and method for driving the same is disclosed in the present invention.

Abstract: An array substrate for a transflective liquid crystal display device includes a substrate; a thin film transistor on the substrate, the thin film transistor including an active layer, a gate electrode, a source electrode and a drain electrode; a gate line connected to the gate electrode; a data line connected to the source electrode, the data line defining a pixel region with the gate line; an active extension portion extending from the active layer to the pixel region, a first insulating layer on the active extension portion; a storage electrode on the first insulating layer over the active extension portion; a second insulating layer on the storage electrode; a reflective plate on the second insulating layer over the storage electrode, the reflective plate extending over one end of the data line and connected to an adjacent reflective plate; a third insulating layer on the reflective plate; and a pixel electrode on the third insulating layer, the pixel electrode extending over one end of the data line and c

Abstract: A driving device includes a plurality of blocks arranged in sequence, each of the blocks includes ninth switching elements connected to received a start pulse, four clock signals, and two source voltages. The switching elements are arranged to output the four clock signals in sequence and to alternatively output the four clock signals in a reverse sequence.

Abstract: A liquid crystal display panel includes: a display part having pixels; a non-display part having driving circuits for driving the display part; a control line formed in the non-display part for applying a drive signal to signal lines of the display part; a scribed line formed in an area of the non-display part crossing the control line; and a shorting bar that runs along the scribed line and bypasses around an area in which the scribed line crosses the control line.

Abstract: A shift register having a built-in level shifter includes a buffer outputting a shift pulse using a first clock signal and a first supply voltage via voltages at first and second nodes; a first controller controlling the voltage of the first node via the start pulse and the second node; and a second controller controlling the second node voltage using the first and second supply voltage via the start pulse and the second clock signal. The level shifter includes a third controller forming a current path between third supply voltage input line and first supply voltage input line controlling a third node using the first supply voltage and a third supply voltage via the voltage of the second node and two of first to fourth clock signals; and an output part outputting the level-shifted shift pulse using the first and third supply voltage via the voltage at the third node.

Abstract: A system for reducing an OFF-current in a thin film transistor of a liquid crystal display device includes gate and data lines crossing each other, a pixel thin film transistor including gate, source and drain electrodes, the gate electrode connected to the gate line and the source electrode connected to the data line, a liquid crystal capacitor connected to the drain electrode of the pixel thin film transistor, a first switch thin film transistor connected to a first end of the data line, a second switch thin film transistor connected to a first end of the gate line, a first voltage source electrically connected to the drain electrode of the pixel thin film transistor, a second voltage source connected to a source electrode of the first switch thin film transistor, a third voltage source connected to gate electrodes of the first and second switch thin film transistors, and a fourth voltage source connected to a source electrode of the second switch thin film transistor.

Abstract: A liquid crystal display and a method for fabricating the same include a first substrate having an active layer with source/drain regions formed therein, a gate line and a data line extending in directions perpendicular to each other formed thereon, a dummy gate insulating film and a dummy gate electrode both formed on the first substrate in fixed patterns isolated from the gate line, an interlayer insulating film on the first substrate inclusive of the dummy gate electrode with a step, a drain electrode formed on the interlayer insulating film to overlap on upper regions of the dummy gate electrode so as to be in contact with the drain region and have a step to the data line, the data line formed on the interlayer insulating having a step to the drain electrode, a passivation film formed on the interlayer insulating film inclusive of the dummy gate electrode and the data line, a contact hole formed to expose the drain electrode overlapped with the dummy gate electrode, and a pixel electrode overlapping upper

Abstract: A liquid crystal display and a method for fabricating the same include a first substrate having an active layer with source/drain regions formed therein, a gate line and a data line extending in directions perpendicular to each other formed thereon, a dummy gate insulating film and a dummy gate electrode both formed on the first substrate in fixed patterns isolated from the gate line, an interlayer insulating film on the first substrate inclusive of the dummy gate electrode with a step, a drain electrode formed on the interlayer insulating film to overlap on upper regions of the dummy gate electrode so as to be in contact with the drain region and have a step to the data line, the data line formed on the interlayer insulating having a step to the drain electrode, a passivation film formed on the interlayer insulating film inclusive of the dummy gate electrode and the data line, a contact hole formed to expose the drain electrode overlapped with the dummy gate electrode, and a pixel electrode overlapping upper

Abstract: A liquid crystal display device that is capable of preventing metal wires from being corroded during its long-term use under the high temperature and high humidity circumference. In the device, a pad is positioned at a non-display area of a substrate to be connected to at least one of a gate line and a data line. A driving circuit responds to an electrical signal from the pad to drive a liquid crystal pixel cell provided within said non-display area of the substrate. A semiconductor pattern is opposed to the driving circuit with having the pad therebetween to be connected between the pad and the driving circuit.

Abstract: A shift register employs only a thin film transistor of the same type channel and has a level shifter built-in. A shift register with a built in level shifter includes a plurality of stages and a plurality of level shifters. The stages are connected in cascade to shift a start pulse inputted through an input terminal and sequentially output the shifted pulse. The level shifters level-shift a voltage level of the shifted pulse applied from each of the stages and outputting it.

Abstract: A method of forming a thin film transistor, includes: forming an active region on a first insulating layer, the active region having a channel region, at least one sub-channel region, and first regions disposed between the channel region and each sub-channel region; sequentially forming a second insulating layer and a first conductive layer over the first insulating layer; patterning the second insulating layer and the first conductive layer to form a gate insulating layer and gate electrode on a channel region of the active layer, and to form a sub-gate insulating layer and associated sub-gate electrode on each sub-channel region of the active layer; forming a mask covering at least a portion of the gate electrode, at least a portion of each sub-gate electrode, and each first region of the active region; and implanting impurities into exposed portions of the active region using the mask to form a source region on a first side of the channel region and a drain region on a second side of the channel region suc

Abstract: The thin film transistor includes an insulating substrate, and an active region formed on the insulating substrate. The active region includes a channel region, a source region formed on a first side of the channel region, a drain region formed on a second side of the channel region, a sub-channel region formed between the channel region and at least one of the source region and the drain region, and a first region formed between the channel region and each sub-channel region. The thin film transistor also includes an insulating layer formed on the channel region and each sub-channel region, a gate electrode formed on the insulating layer over the channel region, and a sub-gate electrode formed on the insulating layer over each sub-channel region. When impurities are implanted therein, the first region forms a lightly doped region; otherwise, each first region forms an offset region.