Patents by Inventor Jae Ean Lee
Jae Ean Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10297553Abstract: An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and conductive vias penetrating through the insulating layers, to be connected to the conductive patterns, respectively; a frame disposed between the first and second wiring parts and having conductive connection parts electrically connecting one or more through-holes with the first and second wiring parts and an electronic component disposed to be surrounded by the through-hole, to thereby be connected to the first wiring part, wherein the conductive patterns formed to be adjacent to the electronic component among the conductive patterns of the first wiring part are embedded in the insulating layer of the first wiring part.Type: GrantFiled: May 17, 2018Date of Patent: May 21, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Yong Ho Baek, Sang Kun Kim, Ye Jeong Kim, Jae Ean Lee, Jae Hoon Choi
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Publication number: 20190131224Abstract: A semiconductor package includes a supporting member that has a cavity and includes a wiring structure connecting first and second surfaces opposing each other. A connection member is on the second surface of the supporting member and includes a first redistribution layer connected to the wiring structure. A semiconductor chip is on the connection member in the cavity and has connection pads connected to the first redistribution layer. An encapsulant encapsulates the semiconductor chip disposed in the cavity and covers the first surface of the supporting member. A second redistribution layer includes wiring patterns embedded in the encapsulant and has exposed surfaces and connection vias that penetrate through the encapsulant to connect the wiring structure and the wiring patterns to each other.Type: ApplicationFiled: March 26, 2018Publication date: May 2, 2019Inventors: Ik Jun Choi, Jae Ean Lee, Kwang Ok Jeong, Young Gwan Ko, Jung Soo Byun
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Publication number: 20190131221Abstract: A semiconductor package includes a semiconductor chip; a connection member having a first surface on which the semiconductor chip is disposed and a second surface opposing the first surface, an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip, a passivation layer on the second surface of the connection member; and an UBM layer partially embedded in the passivation layer, wherein the UBM layer includes an UBM via embedded in the passivation layer and connected to the redistribution layer of the connection member and an UBM pad connected to the UBM via and protruding from a surface of the passivation layer, and a width of a portion of the UBM via in contact with the UBM pad is narrower than a width of a portion of the UBM via in contact with the redistribution layer.Type: ApplicationFiled: March 6, 2018Publication date: May 2, 2019Inventors: Jae Ean LEE, Tae Sung JEONG, Young Gwan KO, Suk Ho LEE, Jung Soo BYUN
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Publication number: 20180269156Abstract: An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and conductive vias penetrating through the insulating layers, to be connected to the conductive patterns, respectively; a frame disposed between the first and second wiring parts and having conductive connection parts electrically connecting one or more through-holes with the first and second wiring parts and an electronic component disposed to be surrounded by the through-hole, to thereby be connected to the first wiring part, wherein the conductive patterns formed to be adjacent to the electronic component among the conductive patterns of the first wiring part are embedded in the insulating layer of the first wiring part.Type: ApplicationFiled: May 17, 2018Publication date: September 20, 2018Inventors: Yong Ho BAEK, Sang Kun KIM, Ye Jeong KIM, Jae Ean LEE, Jae Hoon CHOI
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Patent number: 10045444Abstract: A printed circuit board includes: a core board including, on a first surface thereof, an element mounting part and an element non-mounting part; an insulation layer disposed on the element non-mounting part; a copper-clad laminate plate disposed on the insulation layer; a first penetration via penetrating the insulation layer and the copper-clad laminate plate; and a second penetration via disposed in the core board and connected to the first penetration via.Type: GrantFiled: January 6, 2016Date of Patent: August 7, 2018Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae-Ean Lee, Jee-Soo Mok, Young-Gwan Ko, Kyung-Hwan Ko, Yong-Ho Baek
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Patent number: 9999131Abstract: A printed circuit board including an electronic component and a method of producing the same are provided. The printed circuit board includes a multilayered substrate including an insulation layer and an inner circuit layer laminated therein, a cavity disposed in the multilayered substrate, a via disposed in the insulation layer and configured to electrically connect the inner circuit layer with another inner circuit layer, a first electronic component inserted in the cavity, and a bump pad disposed on a surface of the cavity facing the first electronic component, and the bump pad is formed by having the insulation layer and the via exposed to a lateral side of the cavity.Type: GrantFiled: January 8, 2016Date of Patent: June 12, 2018Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kyung-Hwan Ko, Young-Gwan Ko, Jae-Ean Lee, Jee-Soo Mok, Yong-Ho Baek
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Patent number: 9848492Abstract: A printed circuit board includes: an insulating layer including a cavity formed therein, the cavity being recessed into the insulating layer from a top surface of the insulating layer; a first circuit layer formed inside the insulating layer such that a portion of the first circuit layer is disposed within the cavity; a second circuit layer disposed above the insulating layer; a first surface-treated layer disposed above the portion of the first circuit layer disposed within the cavity; and a second surface-treated layer disposed above the second circuit layer.Type: GrantFiled: April 27, 2016Date of Patent: December 19, 2017Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae-Ean Lee, Jee-Soo Mok, Young-Gwan Ko, Soon-Oh Jung, Kyung-Hwan Ko, Yong-Ho Baek
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Publication number: 20170213794Abstract: An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and conductive vias penetrating through the insulating layers, to be connected to the conductive patterns, respectively; a frame disposed between the first and second wiring parts and having conductive connection parts electrically connecting one or more through-holes with the first and second wiring parts and an electronic component disposed to be surrounded by the through-hole, to thereby be connected to the first wiring part, wherein the conductive patterns formed to be adjacent to the electronic component among the conductive patterns of the first wiring part are embedded in the insulating layer of the first wiring part.Type: ApplicationFiled: December 20, 2016Publication date: July 27, 2017Inventors: Yong Ho BAEK, Sang Kun KIM, Ye Jeong KIM, Jae Ean LEE, Jae Hoon CHOI
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Publication number: 20170079142Abstract: A printed circuit board and a manufacturing method thereof are provided. A printed circuit board may include a first insulating layer comprising a photosensitive material on a core layer, a second insulating layer comprising a material comprising a reinforcing material on the first insulating layer, and a cavity formed in the first insulating layer and the second insulating layer.Type: ApplicationFiled: March 23, 2016Publication date: March 16, 2017Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae-Ean LEE, Jung-Han LEE, Jin-Ho PARK, Jung-Hyun CHO, Yong-Ho BAEK
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Publication number: 20160381792Abstract: A printed circuit board in accordance with an embodiment includes a core layer, a photo imagable dielectric layer, and an inner circuit layer. The core layer includes a core stiffener layer, a first metal layer formed on an upper surface of the core stiffener layer, and a second metal layer formed on a lower surface of the core stiffener layer. The photo imagable dielectric layer is formed on an upper surface and a lower surface of the core layer. The inner circuit layer is formed on the photo imagable dielectric layer.Type: ApplicationFiled: June 6, 2016Publication date: December 29, 2016Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jee-Soo MOK, Young-Gwan KO, Jung-Hyun PARK, Jae-Ean LEE, Young Kuk KO, Going-Sik KIM
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Publication number: 20160374196Abstract: A printed circuit board includes: a first insulating layer; a first circuit layer disposed above the first insulating layer; a second insulating layer disposed above the first insulating layer; a second circuit layer disposed above the second insulating layer and constructed of a photosensitive material; and a protective layer disposed above the second insulating layer and surrounding the second circuit layer, wherein the protective layer includes a tunnel type cavity and exposes a portion of the second circuit layer to an outside environment, and wherein the second insulating layer exposes a portion of the first circuit layer located below the cavity to an outside environment.Type: ApplicationFiled: April 20, 2016Publication date: December 22, 2016Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae-Ean LEE, Jee-Soo MOK, Young-Gwan KO, Soon-Oh JUNG, Kyung-Hwan KO, Yong-Ho BAEK
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Publication number: 20160374197Abstract: A printed circuit board includes: an insulating layer including a cavity formed therein, the cavity being recessed into the insulating layer from a top surface of the insulating layer; a first circuit layer formed inside the insulating layer such that a portion of the first circuit layer is disposed within the cavity; a second circuit layer disposed above the insulating layer; a first surface-treated layer disposed above the portion of the first circuit layer disposed within the cavity; and a second surface-treated layer disposed above the second circuit layer.Type: ApplicationFiled: April 27, 2016Publication date: December 22, 2016Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae-Ean LEE, Jee-Soo MOK, Young-Gwan KO, Soon-Oh JUNG, Kyung-Hwan KO, Yong-Ho BAEK
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Publication number: 20160242277Abstract: A printed circuit board and method of manufacturing the same are provided. The printed circuit board includes a first substrate including a first insulation layer and a first circuit layer including a bonding pad, the bonding pad disposed on the first insulation layer, a second substrate disposed on the first substrate and having a cavity exposing the bonding pad to an outside, and a dam disposed between the bonding pad and an inner wall of the cavity.Type: ApplicationFiled: February 11, 2016Publication date: August 18, 2016Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jae-Ean LEE, Jee-Soo MOK, Young-Gwan KO, Soon-Oh JUNG, Kyung-Hwan KO, Yong-Ho BAEK
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Publication number: 20160219712Abstract: A printed circuit board including an electronic component and a method of producing the same are provided. The printed circuit board includes a multilayered substrate including an insulation layer and an inner circuit layer laminated therein, a cavity disposed in the multilayered substrate, a via disposed in the insulation layer and configured to electrically connect the inner circuit layer with another inner circuit layer, a first electronic component inserted in the cavity, and a bump pad disposed on a surface of the cavity facing the first electronic component, and the bump pad is formed by having the insulation layer and the via exposed to a lateral side of the cavity.Type: ApplicationFiled: January 8, 2016Publication date: July 28, 2016Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Kyung-Hwan Ko, Young-Gwan Ko, Jae-Ean Lee, Jee-Soo Mok, Yong-Ho Baek
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Publication number: 20160205780Abstract: A printed circuit board includes: a core board including, on a first surface thereof, an element mounting part and an element non-mounting part; an insulation layer disposed on the element non-mounting part; a copper-clad laminate plate disposed on the insulation layer; a first penetration via penetrating the insulation layer and the copper-clad laminate plate; and a second penetration via disposed in the core board and connected to the first penetration via.Type: ApplicationFiled: January 6, 2016Publication date: July 14, 2016Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae-Ean Lee, Jee-Soo Mok, Young-Gwan Ko, Kyung-Hwan Ko, Yong-Ho Baek
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Publication number: 20160037645Abstract: An embedded board and a method of manufacturing the same are provided. The embedded board includes a core substrate below which a mounting pad is formed, a first substrate formed below the core substrate and having a first cavity formed therein, and a second substrate formed below the first substrate and having a second cavity formed therein. The first cavity and the second cavity are connected to each other and externally expose the mounting pad.Type: ApplicationFiled: July 23, 2015Publication date: February 4, 2016Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae Ean LEE, Jee Soo MOK, Young Gwan KO, Kyung Hwan KO, Yong Ho BAEK
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Publication number: 20160021744Abstract: A printed circuit board includes a first circuit pattern embedded in an insulating layer so that an upper surface of the first circuit pattern is exposed to one surface of the insulating layer, a coupling pad embedded in the insulating layer to come into contact with a lower surface of the first circuit pattern, and a bump pad formed on the upper surface of the first circuit pattern to protrude from one surface of the insulating layer.Type: ApplicationFiled: June 10, 2015Publication date: January 21, 2016Inventors: Yong Ho BAEK, Young Gwan KO, Jung Hyun CHO, Jae Ean LEE, Jae Hoon CHOI, Jung Hyun PARK
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Publication number: 20150342054Abstract: Embodiments of the invention provide an embedded coreless substrate, and a method for manufacturing the same. According to an embodiment of the present invention, an embedded coreless substrate includes an insulating layer, a conductive pattern including a plurality of circuit pattern layers formed in(on) the insulating layer and a plurality of vias for vertically connecting the circuit pattern layers, and at least one embedded device, which is partially embedded in the insulating layer and an outer circuit pattern layer among the plurality of circuit pattern layers and of which an electrode in an embedded portion is partially or entirely covered with the outer circuit pattern layer to fix the embedded portion, is provided. Further, a method for manufacturing an embedded coreless substrate is provided.Type: ApplicationFiled: March 24, 2015Publication date: November 26, 2015Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yong Ho BAEK, Hyo Seung NAM, Jae Ean LEE, Ju Yeon BONG, Jung Hyun CHO, Kyung Hwan KO
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Publication number: 20150251278Abstract: A solder ball has a core, an intermediate layer, and a surface layer. In one aspect, the intermediate layer melts at a temperature higher than that of the surface layer. In another aspect, the core is made of a material that maintains a liquid state through a temperature range of from about 20° C. to about 110° C., the intermediate layer is made of a material that maintains a solid state at temperatures up to about 270° C., and the surface layer is made of a material with a melting temperature of about 230° C. to about 270° C. In another aspect, the first metal and the second metal are materials that do not form an intermetallic compound with another material in the solder ball. The solder ball may be used in a circuit board.Type: ApplicationFiled: July 31, 2014Publication date: September 10, 2015Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jae Ean LEE, Jung Hyun CHO, Kyung Hwan KO, Yong Ho BAEK
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Publication number: 20150143694Abstract: Disclosed herein is a carrier for manufacturing a printed circuit board, including: an insulating layer; a release layer buried in at least any one of top and bottom surfaces of the insulating layer and having a length shorter than that of the insulating layer; and a metal foil bonded to a surface of the insulating layer in which the release layer is buried and having a length longer than that of the release layer, thereby increasing reliability of a product in the manufacturing the substrate using the carrier.Type: ApplicationFiled: September 15, 2014Publication date: May 28, 2015Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae Ean Lee, Jung Hyun Cho, Kyung Hwan Ko, Yong Ho Baek