Abstract: A power semiconductor device includes: a drain region of a first conductive type; a drift region of a first conductive type formed on the drain region; a first body region of a second conductive type formed below an upper surface of the drift region; a second body region of a second conductive type formed below the upper surface of the drift region and in the first body region; a third body region of a second conductive type formed by protruding downwards from a lower end of the first body region; a source region of a first conductive type formed below the upper surface of the drift region and in the first body region; and a gate insulating layer formed on channel regions of the first body region and on the drift region between the first body regions.

Abstract: A superjunction semiconductor device includes an edge p pillar, an active region, and a termination region. The edge p pillar has a rectangular ring shape with rounded corners. The edge p pillar has an outer region surrounding the active region and an inner region on in the sides of the active region. The active region has active p pillars and active n pillars having vertical stripe shapes. The active p pillars and the active n pillars are alternately arranged horizontally in the active region. The termination region includes termination n pillars and termination p pillars alternately arranged around the edge p pillar.

Abstract: A superjunction semiconductor device includes an edge p pillar, an active region, and a termination region. The edge p pillar has a rectangular ring shape with rounded corners surrounding the active region. The active region includes an active n region and active p pillars having vertical stripe shapes disposed at regular intervals in the active n region. The top and bottom ends of the active p pillars are separated from the edge p pillar. The termination region includes termination n pillars and termination p pillars alternately arranged around the edge p pillar. Surplus p charges that are not used to balance the quantity of p charges and the quantity of n charges among p charges included in the upper and lower parts of the edge p pillar are eliminated or n charges are supplemented to balance the quantity of p charges and the quantity of n charges.

Abstract: Disclosed herein is a water-source heat-pump type air conditioner in which a receiver is connected to a super-cooler or economizer, and a control method of the air conditioner to reduce the quantity of liquid refrigerant collected in the receiver during a cooling/heating overload operation. When a cooling/heating overload operation occurs, an electric expansion valve associated with the super-cooler or the economizer is opened by a predetermined opening degree, to bypass high-pressure liquid refrigerant collected in the receiver, thereby preventing a rapid pressure increase due to a great quantity of liquid refrigerant collected in the receiver.

Abstract: Disclosed herein are an air conditioner which controls a pressure of a refrigerant of an outdoor unit by adjusting an opening degree of an outdoor expansion valve or an indoor expansion valve, and a control method thereof. The air conditioner measures a pressure of the refrigerant discharged from a compressor during a cooling operation, and raises the pressure of the refrigerant to be higher than a designated pressure by controlling an opening degree of at least one of the outdoor expansion valve and the indoor expansion valve, if the pressure of the refrigerant is lower than the designated pressure. Further, the air conditioner measures the pressure of the refrigerant inhaled into the compressor during a heating operation, and adjusts the pressure of the refrigerant to be lower than a designated pressure by controlling the opening degree of the outdoor expansion valve, if the pressure of the refrigerant is higher than the designated pressure.

Abstract: A method of fabricating a high-voltage semiconductor device includes the following steps: providing a semiconductor layer; forming a plurality of trenches in the semiconductor layer to define a plurality of pillars of a first conductivity type in the semiconductor layer between adjacent trenches, wherein the trenches extend from a top surface of the semiconductor layer toward a bottom surface of the semiconductor layer; forming a charge compensation layer of a second conductivity type over at least sidewalls of each trench to a predetermined thickness thereby forming a groove in each trench; and substantially filling each groove with a charge compensation plug of the first conductivity type.

Abstract: A high-voltage semiconductor device includes a semiconductor layer having a plurality of pillars of a first conductivity type defined by a plurality of trenches which extend from a top surface of the semiconductor layer toward a bottom surface thereof. A charge compensation layer of a second conductivity type is disposed over at least sidewalls of each trench to a predetermined thickness to form a groove in each trench. A charge compensation plug of the first conductivity type substantially fills each groove.

Abstract: Disclosed relates to a structure of two-level n-gram inverted index and methods of building the same, processing queries and deriving the index that reduce the size of n-gram inverted index and improves the query performance by eliminating the redundancy of the position information that exists in the n-gram inverted index. The inverted index of the present invention comprises a back-end inverted index using subsequences extracted from documents as a term and a front-end inverted index using n-grams extracted from the subsequences as a term. The back-end inverted index uses the subsequences of a specific length extracted from the documents to be overlapped with each other by n?1 (n: the length of n-gram) as a term and stores position information of the subsequences occurring in the documents in a posting list for the respective subsequences.

Abstract: In accordance with an embodiment of the invention, a superjunction semiconductor device includes an active region and a termination region surrounding the active region. A central vertical axis of a boundary column of a second conductivity type material defines the boundary between the active region and the termination region. The active and termination regions include columns of first and second conductivity type material alternately arranged along a horizontal direction in a semiconductor region having top and bottom surfaces. At least one of the columns of the first conductivity type material in the termination region has a different width than a width of the columns of the first conductivity type material in the active region.

Abstract: In accordance with an embodiment of the invention, a superjunction semiconductor device includes an active region and a termination region surrounding the active region. A central vertical axis of a boundary column of a second conductivity type material defines the boundary between the active region and the termination region. The active and termination regions include columns of first and second conductivity type material alternately arranged along a horizontal direction in a semiconductor region having top and bottom surfaces. At least one of the columns of the first conductivity type material in the termination region has a different width than a width of the columns of the first conductivity type material in the active region.

Abstract: A high-voltage semiconductor device includes a semiconductor layer having a plurality of pillars of a first conductivity type defined by a plurality of trenches which extend from a top surface of the semiconductor layer toward a bottom surface thereof. A charge compensation layer of a second conductivity type is disposed over at least sidewalls of each trench to a predetermined thickness to form a groove in each trench. A charge compensation plug of the first conductivity type substantially fills each groove.

Abstract: In accordance with an embodiment of the invention, a superjunction semiconductor device includes an active region and a termination region surrounding the active region. A central vertical axis of a boundary column of a second conductivity type material defines the boundary between the active region and the termination region. The active and termination regions include columns of first and second conductivity type material alternately arranged along a horizontal direction in a semiconductor region having top and bottom surfaces. At least one of the columns of the first conductivity type material in the termination region has a different width than a width of the columns of the first conductivity type material in the active region.

Abstract: Disclosed relates to a structure of two-level n-gram inverted index and methods of building the same, processing queries and deriving the index that reduce the size of n-gram inverted index and improves the query performance by eliminating the redundancy of the position information that exists in the n-gram inverted index. The inverted index of the present invention comprises a back-end inverted index using subsequences extracted from documents as a term and a front-end inverted index using n-grams extracted from the subsequences as a term. The back-end inverted index uses the subsequences of a specific length extracted from the documents to be overlapped with each other by n?1 (n: the length of n-gram) as a term and stores position information of the subsequences occurring in the documents in a posting list for the respective subsequences.

Abstract: Provided is a high-voltage semiconductor device which is constructed such that the quantity of P and N charges are balanced in the entire drift region thereby preventing the degradation of the device breakdown characteristics. The high-voltage semiconductor device comprises an active region including N pillars of N conductivity type and P pillars of P conductivity type, arranged alternately in a direction from a center portion of the active region to an outer portion thereof to encircle each other in a horizontal direction. The N and P pillars are formed in a closed shape.

Abstract: A superjunction semiconductor device includes an edge p pillar, an active region, and a termination region. The edge p pillar has a rectangular ring shape with rounded corners surrounding the active region. The active region includes an active n region and active p pillars having vertical stripe shapes disposed at regular intervals in the active n region. The top and bottom ends of the active p pillars are separated from the edge p pillar. The termination region includes termination n pillars and termination p pillars alternately arranged around the edge p pillar. Surplus p charges that are not used to balance the quantity of p charges and the quantity of n charges among p charges included in the upper and lower parts of the edge p pillar are eliminated or n charges are supplemented to balance the quantity of p charges and the quantity of n charges.

Abstract: In accordance with an embodiment of the invention, a superjunction semiconductor device includes an active region and a termination region surrounding the active region. A central vertical axis of a boundary column of a second conductivity type material defines the boundary between the active region and the termination region. The active and termination regions include columns of first and second conductivity type material alternately arranged along a horizontal direction in a semiconductor region having top and bottom surfaces. At least one of the columns of the first conductivity type material in the termination region has a different width than a width of the columns of the first conductivity type material in the active region.