Abstract: A method of forming micropatterns separated over a misalignment margin includes forming a first mold pattern including a main pattern and a separation-assist pattern, forming a first spacer mask having a first width around the first mold pattern, forming a second mold pattern using the first spacer mask as an etch mask, forming a second spacer mask having a second width around the second mold pattern, and forming a target pattern using the second spacer mask as an etch mask.

Abstract: Semiconductor devices and methods of forming semiconductor devices are provided in which a plurality of patterns are simultaneously formed to have different widths and the pattern densities of some regions are increased using double patterning.

Abstract: A method of fabricating an integrated circuit device includes forming first and second preliminary mask structures on a hard mask layer in respective first and second regions of the substrate. Spacers are formed on opposing sidewalls of the first and second preliminary mask structures, and the first preliminary mask structure is selectively removed from between the spacers in the first region. The hard mask layer is etched using the spacers and the second preliminary mask structure as a mask to define a first mask pattern including the opposing sidewall spacers with a void therebetween in the first region and a second mask pattern including the opposing sidewall spacers and the second preliminary mask structure therebetween in the second region.

Abstract: Methods of forming a semiconductor device may include providing a feature layer having a first region and a second region. The methods may also include forming a dual mask layer on the feature layer. The methods may further include forming a variable mask layer on the dual mask layer. The methods may additionally include forming a first structure on the feature layer in the first region and a second structure on the feature layer in the second region by patterning the variable mask layer and the dual mask layer. The methods may also include forming a first spacer on a sidewall of the first structure and a second spacer on a sidewall of the second structure. The methods may further include removing the first structure while maintaining at least a portion of the second structure.

Abstract: Methods of forming a semiconductor device can be provided by simultaneously forming a plurality of mask patterns using self-aligned reverse patterning, including respective mask pattern elements having different widths.

Abstract: Methods of forming integrated circuit devices utilize fine width patterning techniques to define conductive or insulating patterns having relatively narrow and relative wide lateral dimensions. A target material layer is formed on a substrate and first and second mask layers of different material are formed in sequence on the target material layer. The second mask layer is selectively etched to define a first pattern therein. Sidewall spacers are formed on opposing sidewalls of the first pattern. The first pattern and sidewall spacers are used collectively as an etching mask during a step to selectively etch the first mask layer to define a second pattern therein. The first pattern is removed to define an opening between the sidewall spacers. The first mask layer is selectively re-etched to convert the second pattern into at least a third pattern, using the sidewall spacers as an etching mask. The target material layer is selectively etched using the third pattern as an etching mask.

Abstract: A method of fabricating an integrated circuit device includes forming first and second preliminary mask structures on a hard mask layer in respective first and second regions of the substrate. Spacers are formed on opposing sidewalls of the first and second preliminary mask structures, and the first preliminary mask structure is selectively removed from between the spacers in the first region. The hard mask layer is etched using the spacers and the second preliminary mask structure as a mask to define a first mask pattern including the opposing sidewall spacers with a void therebetween in the first region and a second mask pattern including the opposing sidewall spacers and the second preliminary mask structure therebetween in the second region.

Abstract: Semiconductor devices and methods of forming semiconductor devices are provided in which a plurality of patterns are simultaneously formed to have different widths and the pattern densities of some regions are increased using double patterning.

Abstract: In a method of forming a dielectric layer pattern, lower patterns are formed on a substrate. A first dielectric layer is formed on sidewalls and upper surfaces of the lower patterns and a surface of the substrate. A mask pattern is formed on the first dielectric layer to partially expose the first dielectric layer. The exposed first dielectric layer on upper surfaces and upper sidewalls of the lower patterns is partially removed and the removed first dielectric layer is deposited on surfaces of the first dielectric layer between the lower patterns, to form a second dielectric layer having a thickness greater than that of the first dielectric layer. The second dielectric layer on the sidewalls of the lower patterns and the substrate is etched to form a dielectric layer pattern. Accordingly, damage to the underlying layer may be reduced, and an unnecessary dielectric layer may be completely removed.

Abstract: Methods of forming a semiconductor device can be provided by simultaneously forming a plurality of mask patterns using self-aligned reverse patterning, including respective mask pattern elements having different widths.

Abstract: In a method of forming a dielectric layer pattern, lower patterns are formed on a substrate. A first dielectric layer is formed on sidewalls and upper surfaces of the lower patterns and a surface of the substrate. A mask pattern is formed on the first dielectric layer to partially expose the first dielectric layer. The exposed first dielectric layer on upper surfaces and upper sidewalls of the lower patterns is partially removed and the removed first dielectric layer is deposited on surfaces of the first dielectric layer between the lower patterns, to form a second dielectric layer having a thickness greater than that of the first dielectric layer. The second dielectric layer on the sidewalls of the lower patterns and the substrate is etched to form a dielectric layer pattern. Accordingly, damage to the underlying layer may be reduced, and an unnecessary dielectric layer may be completely removed.