Abstract: A column driver of a display device provides a high slew rate with lowered power requirements by using external switches connected to upper and bottom output buffers. The upper output buffer is driven between a first voltage rail and a second voltage rail, and outputs a first output signal in response to a first input signal and a second input signal. The bottom output buffer is driven between the second voltage rail and a third voltage rail, and outputs a second output signal in response to a third input signal and a fourth input signal. A first switch group selectively provides input for the upper output buffer and the bottom output buffer. A second switch group feeds back the first and the second output signals to the first or the second input terminal of each of the upper output buffer and the bottom output buffer.

Abstract: There is provided an apparatus for output buffering having a half-swing rail-to-rail structure. The apparatus provides output buffering by using a switch structure in order to attain a high slew rate and low power characteristics, thereby reducing current consumption. The provided apparatus for output buffering having a half-swing rail-to-rail structure includes a first output buffer, driven between a first voltage rail and a second voltage rail and outputting a first output signal in response to a first input signal and a second input signal, and a second output buffer, driven between the first and the second voltage rails and a third voltage rail and outputting a second output signal in response to a third input signal and a fourth input signal.

Abstract: The present invention relates to mitochondrial protein that can be used as a marker for diagnosing stomach cancer. According to the present invention, the marker for diagnosing stomach cancer comprises mitochondrial enoyl coenzyme A hydratase 1.

Abstract: A power-off discharge circuit comprises a power voltage detection unit that detects whether a first power voltage for driving a source driver circuit is blocked and generates a discharge control signal, and a discharge unit that discharges a load circuit in a display panel based on the discharge control signal.

Abstract: A receiver for receiving information that contains clock information and data information and a clock-embedded interface method. In the clock-embedded method, a clock signal and data may be reconstructed by receiving a pair of differential signals that contain clock information and data information and by using a change in a common voltage of the pair of differential signals.

Abstract: A power-off discharge circuit comprises a power voltage detection unit that detects whether a first power voltage for driving a source driver circuit is blocked and generates a discharge control signal, and a discharge unit that discharges a load circuit in a display panel based on the discharge control signal.

Abstract: In a liquid crystal display (LCD) panel driver with a self-masking function using a power-on reset signal, and in a method of driving the same, the LCD panel driver includes a power-on reset signal generation unit that generates a power-on reset signal in response to a supply voltage applied to a LCD panel; a latch unit that receives a start pulse signal instructing that source lines of the LCD panel be driven and generates first and second set signals for setting an initial value of an output signal of a flip-flop to be in a predetermined default logic level, in response to the power-on reset signal; and a counter unit that generates a start pulse masking signal by masking at least one pulse of the start pulse signal in response to the first and second set signals and the start pulse signal.

Abstract: Provided are a method of driving a liquid crystal panel using self-masking, a masking circuit for performing the method, and asymmetric latches. The method includes supplying power to the liquid crystal panel; receiving a horizontal start pulse signal instructing source lines of the liquid crystal panel to be driven, from a timing controller; generating a horizontal start masking signal by masking at least one pulse of the horizontal start pulse signal; and driving the source lines in response to the horizontal start masking signal. The horizontal start masking signal turns off the switches until signals output from the source driver, which correspond to image data of the liquid crystal panel, are supplied. Accordingly, it is possible to prevent unknown image data from being displayed on the liquid crystal display when the liquid crystal panel is powered on.

Abstract: Provided are a delay locked loop (DLL) having a pulse width detection circuit and a method of driving the DLL. The DLL includes a pulse width detection circuit and a delay circuit. The pulse width detection circuit receives a reference clock signal, detects a pulse width of the reference clock signal, and outputs the detection result as a pulse width detection result signal. The delay circuit receives and delays the reference clock signal, and outputs the delayed reference clock signal as an output clock signal. The delay circuit receives the pulse width detection result signal from the pulse width detection circuit, and controls a time delay in the reference clock signal in response to the pulse width detection result signal.

Abstract: Provided are a method of driving a liquid crystal panel which prevents unintended digital image data from being displayed on a liquid crystal panel when power is provided or interrupted, and a source driver and a liquid crystal display apparatus. The source driver includes output buffers; output pads; and a switching unit which is disposed between the output buffers and the output pads and controls an electrical connection state of the output pads. If a level up or a level down of a power voltage occurs, the switching unit prevents output signals of the output buffers from being transmitted to the liquid crystal panel via corresponding output pads and performs at least one of a charge sharing operation for connecting the output pads to each other and a discharging operation for providing a discharge path from the output pads to a ground terminal, in a preset period.

Abstract: A source driver includes a hold memory block, a pre-decoding block, a level shifting block and digital-to-analog (DAC) block. The hold memory block stores digital image data. The pre-decoding block generates a data code that includes at least one bit having a first logic level based on the digital image data and generates a plurality of enable signals based on the data code. The level shifting block performs level shifting of the data code based on the enable signals. The DAC block outputs a grayscale voltage that is selected based on the level shifted data code output from the level shifting block. A source driver module and a display device include a plurality of the source drivers.

Abstract: A receiver for receiving information that contains clock information and data information and a clock-embedded interface method. In the clock-embedded method, a clock signal and data may be reconstructed by receiving a pair of differential signals that contain clock information and data information and by using a change in a common voltage of the pair of differential signals.

Abstract: A power-off discharge circuit comprises a power voltage detection unit that detects whether a first power voltage for driving a source driver circuit is blocked and generates a discharge control signal, and a discharge unit that discharges a load circuit in a display panel based on the discharge control signal.

Abstract: Provided are a delay locked loop (DLL) having a pulse width detection circuit and a method of driving the DLL. The DLL includes a pulse width detection circuit and a delay circuit. The pulse width detection circuit receives a reference clock signal, detects a pulse width of the reference clock signal, and outputs the detection result as a pulse width detection result signal. The delay circuit receives and delays the reference clock signal, and outputs the delayed reference clock signal as an output clock signal. The delay circuit receives the pulse width detection result signal from the pulse width detection circuit, and controls a time delay in the reference clock signal in response to the pulse width detection result signal.

Abstract: In a liquid crystal display (LCD) panel driver with a self-masking function using a power-on reset signal, and in a method of driving the same, the LCD panel driver includes a power-on reset signal generation unit that generates a power-on reset signal in response to a supply voltage applied to a LCD panel; a latch unit that receives a start pulse signal instructing that source lines of the LCD panel be driven and generates first and second set signals for setting an initial value of an output signal of a flip-flop to be in a predetermined default logic level, in response to the power-on reset signal; and a counter unit that generates a start pulse masking signal by masking at least one pulse of the start pulse signal in response to the first and second set signals and the start pulse signal.

Abstract: Provided are a method of driving a liquid crystal panel using self-masking, a masking circuit for performing the method, and asymmetric latches. The method includes supplying power to the liquid crystal panel; receiving a horizontal start pulse signal instructing source lines of the liquid crystal panel to be driven, from a timing controller; generating a horizontal start masking signal by masking at least one pulse of the horizontal start pulse signal; and driving the source lines in response to the horizontal start masking signal. The horizontal start masking signal turns off the switches until signals output from the source driver, which correspond to image data of the liquid crystal panel, are supplied. Accordingly, it is possible to prevent unknown image data from being displayed on the liquid crystal display when the liquid crystal panel is powered on.

Abstract: The present invention relates to a primer set for confirming an increase of mRNA in an ATP-sensitive potassium channel (KATP channel)(Kir6.1) having an effect of protecting heart from hypoxia or an ischemic disease; a kit including the primer set; and a method of identifying an agent for treating an ischemic heart disease.

Abstract: The present invention relates to mitochondrial protein that can be used as a marker for diagnosing stomach cancer. According to the present invention, the marker for diagnosing stomach cancer comprises mitochondrial enoyl coenzyme A hydratase 1.

Abstract: A source driver includes a hold memory block, a pre-decoding block, a level shifting block and digital-to-analog (DAG) block. The hold memory block stores digital image data. The pre-decoding block generates a data code that includes at least one bit having a first logic level based on the digital image data and generates a plurality of enable signals based on the data code. The level shifting block performs level shifting of the data code based on the enable signals. The DAC block outputs a grayscale voltage that is selected based on the level shifted data code output from the level shifting block. A source driver module and a display device include a plurality of the source drivers.

Abstract: A semiconductor device having a capacitor of large capacitance and the fabrication method thereof are disclosed. The semiconductor device comprises; a first electrode composed of a conductive structure whose entire surface, including sidewalls, are uneven and formed on the semiconductor substrate; a second electrode formed on the first electrode; and a dielectric film formed between the first and second electrodes. Also the method comprises the steps of forming as a first electrode a conductive structure with an uneven surface on a semiconductor structure, forming a dielectric film, and forming a conductive layer as a second electrode on the conductive structure. Accordingly, a capacitor of large capacitance and high reliability can be obtained.