Abstract: A memory cell and a method for fabricating same. The memory cell comprises a source region and a drain region formed in a semiconductor substrate and a channel region defined between the source and drain regions. Charge storage layers are formed the channel region. A gate insulating layer is formed on the channel region between the charge storage layers, and a gate electrode is formed on the gate insulating layer and the charge trapping storage layers.

Abstract: A flash memory device including a tunnel dielectric layer, a floating gate layer, an interlayer dielectric layer and at least two mold layers formed on a semiconductor substrate and a method of manufacturing the same are provided. By sequentially patterning the layers, a first mold layer pattern and a floating gate layer pattern aligned with each other are formed. Exposed portions of side surfaces of the first mold layer pattern are selectively lateral etched, thereby forming a first mold layer second pattern having grooves in its sidewalls. A gate dielectric layer is formed on the semiconductor substrate adjacent to the floating gate layer pattern. A control gate having a width that is determined by the grooves in the second mold layer pattern is formed on the gate dielectric layer. By removing the first mold layer second pattern, spacers are formed on sidewalls of the control gate.

Abstract: A tunneling dielectric layer, a charge trapping layer, a first length defining layer, and a second length defining layer are sequentially deposited on a semiconductor substrate. These layers are sequentially patterned. Exposed both sidewalls of the first length defining layer first pattern are recessed by selective side etching. After forming a blocking layer for covering the exposed charge trapping layer and a gate layer for filling the recessed portion, the gate layer is patterned to form spacer shaped gates. Dopant regions for source and drain regions are formed on the semiconductor substrate adjacent the gates.

Abstract: Disclosed is an indwelling fecal diverting device. The device comprises an elongate tube formed, at an upper end thereof, with a tubular body part; a pair of fixing balloons attached up and down to an outer surface of the tubular body part such that a clamping portion is defined between the fixing balloons; and a tube opening and closing balloon attached to an inner surface of the tubular body part. An injection passage is defined in the tube so that a remedial liquid can be injected through the injection passage to the outside of the tube to medically treat an anastomosed portion of an intestinal tract of a patient. The indwelling fecal diverting device is fitted into the intestinal tract of the patient, air is supplied into the fixing balloons to inflate them, and the intestinal tract is clamped around the clamping portion using a clamping band.

Abstract: A memory cell and a method for fabricating same. The memory cell comprises a source region and a drain region formed in a semiconductor substrate and a channel region defined between the source and drain regions. Charge storage layers are formed the channel region. A gate insulating layer is formed on the channel region between the charge storage layers, and a gate electrode is formed on the gate insulating layer and the charge trapping storage layers.