Patents by Inventor Jae Hyoung Youn
Jae Hyoung Youn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9046727Abstract: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.Type: GrantFiled: March 31, 2009Date of Patent: June 2, 2015Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Kwang-Ho Lee, Jang-Soo Kim, Hong-Suk Yoo, Sang-Soo Kim, Shi-Yul Kim, Jae-Hyoung Youn
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Publication number: 20150129885Abstract: A method for forming a thin film according to an exemplary embodiment of the present invention includes forming the thin film at a power density in the range of approximately 1.5 to approximately 3 W/cm2 and at a pressure of an inert gas that is in the range of approximately 0.2 to approximately 0.3 Pa. This process results in an amorphous metal thin film barrier layer that prevents undesired diffusion from adjacent layers, even when this barrier layer is thinner than many conventional barrier layers.Type: ApplicationFiled: January 26, 2015Publication date: May 14, 2015Inventors: Byeong-Beom KIM, Je-Hyeong PARK, Jae-Hyoung YOUN, Jean-Ho SONG, Jong-In KIM
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Publication number: 20150053984Abstract: A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.Type: ApplicationFiled: October 20, 2014Publication date: February 26, 2015Inventors: JEAN-HO SONG, Shin-Il Choi, Sun-Young Hong, Shi-Yul Kim, Ki-Yeup Lee, Jae-Hyoung Youn, Sung-Ryul Kim, O-Sung Seo, Yang-Ho Bae, Jong-Hyun Choung, Dong-Ju Yang, Bong-Kyun Kim, Hwa-Yeul Oh, Pil-Soon Hong, Byeong-Beom Kim, Je-Hyeong Park, Yu-Gwang Jeong, Jong-In Kim, Nam-Seok Suh
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Patent number: 8946025Abstract: A method for forming a thin film according to an exemplary embodiment of the present invention includes forming the thin film at a power density in the range of approximately 1.5 to approximately 3 W/cm2 and at a pressure of an inert gas that is in the range of approximately 0.2 to approximately 0.3 Pa. This process results in an amorphous metal thin film barrier layer that prevents undesired diffusion from adjacent layers, even when this barrier layer is thinner than many conventional barrier layers.Type: GrantFiled: February 3, 2011Date of Patent: February 3, 2015Assignee: Samsung Display Co., Ltd.Inventors: Byeong-Beom Kim, Je-Hyeong Park, Jae-Hyoung Youn, Jean-Ho Song, Jong-In Kim
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Patent number: 8865528Abstract: A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.Type: GrantFiled: July 27, 2010Date of Patent: October 21, 2014Assignee: Samsung Display Co., Ltd.Inventors: Jean-Ho Song, Shin-Il Choi, Sun-Young Hong, Shi-Yul Kim, Ki-Yeup Lee, Jae-Hyoung Youn, Sung-Ryul Kim, O-Sung Seo, Yang-Ho Bae, Jong-Hyun Choung, Dong-Ju Yang, Bong-Kyun Kim, Hwa-Yeul Oh, Pil-Soon Hong, Byeong-Beom Kim, Je-Hyeong Park, Yu-Gwang Jeong, Jong-In Kim, Nam-Seok Suh
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Publication number: 20140209903Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.Type: ApplicationFiled: March 31, 2014Publication date: July 31, 2014Applicant: Samsung Display Co., Ltd.Inventors: Pil-Sang YUN, Ki-Won KIM, Hye-Young RYU, Woo-Geun LEE, Seung-Ha CHOI, Jae-Hyoung YOUN, Kyoung-Jae CHUNG, Young-Wook LEE, Je-Hun LEE, Kap-Soo YOON, Do-Hyun KIM, Dong-Ju YANG, Young-Joo CHOI
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Patent number: 8730420Abstract: A liquid crystal display to prevent light leakage with an improvement of aperture ratio and a reduction of load of a data line is provided. The liquid crystal display includes a gate line and a storage electrode line formed on a insulating substrate and apart from each other, a first data line and a second data line intersecting the gate line, a first pixel electrode defined by the gate line and the first data line, and a second pixel electrode defined by the gate line and the second data line and neighboring the first pixel electrode. Also, a blocking electrode between the first pixel electrode and the second pixel electrode is included, wherein at least portion of the first data line is disposed under the first pixel electrode, and at least portion of the blocking electrode is disposed under the second pixel electrode and apart from the first data line.Type: GrantFiled: March 13, 2012Date of Patent: May 20, 2014Assignee: Samsung Display Co., Ltd.Inventors: Woo-Geun Lee, Shi-Yul Kim, Jae-Hyoung Youn, Young-Wook Lee
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Patent number: 8723179Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.Type: GrantFiled: December 1, 2010Date of Patent: May 13, 2014Assignee: Samsung Display Co., Ltd.Inventors: Pil-Sang Yun, Ki-Won Kim, Hye-Young Ryu, Woo-Geun Lee, Seung-Ha Choi, Jae-Hyoung Youn, Kyoung-Jae Chung, Young-Wook Lee, Je-Hun Lee, Kap-Soo Yoon, Do-Hyun Kim, Dong-Ju Yang, Young-Joo Choi
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Patent number: 8686423Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.Type: GrantFiled: September 5, 2012Date of Patent: April 1, 2014Assignee: Samsung Display Co., Ltd.Inventors: Sung-Ryul Kim, Jean-Ho Song, Jae-Hyoung Youn, O-Sung Seo, Byeong-Beom Kim, Je-Hyeong Park, Jong-In Kim, Jae-Jin Song
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Patent number: 8604469Abstract: A thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode, a gate insulating layer formed on the gate line, a semiconductor formed on the gate insulating layer and including a channel of a thin film transistor, a data line formed on the semiconductor and including a source electrode and a drain electrode formed on the semiconductor and opposite to the source electrode with respect to the channel of the thin film transistor, wherein the channel of the thin film transistor covers both side surfaces of the gate electrode.Type: GrantFiled: May 13, 2009Date of Patent: December 10, 2013Assignee: Samsung Display Co., Ltd.Inventors: Woo-Geun Lee, Jae-Hyoung Youn, Ki-Won Kim, Young-Wook Lee, Jong-In Kim
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Patent number: 8598581Abstract: A method for manufacturing a thin film transistor array panel includes; forming a gate line including a gate electrode and a height increasing member on a substrate, forming a gate insulating layer on the gate line and the height increasing member, forming a semiconductor, a data line including a source electrode, and a drain electrode facing the source electrode and overlapping at least a portion of the height increasing member on the gate insulating layer, forming a first insulating layer on the gate insulating layer, a data line and the drain electrode, forming a light-blocking member on a portion of the first insulating layer corresponding to the gate line and the data line, forming a color filter in an area bound by the light-blocking member, forming a second insulating layer on the light-blocking member and the color filter, and patterning the second insulating layer, the light-blocking member or the color filter, and the first insulating layer to form a contact hole exposing a portion of the drain elecType: GrantFiled: May 4, 2009Date of Patent: December 3, 2013Assignee: Samsung Display Co., Ltd.Inventors: Jang-Soo Kim, Jae-Hyoung Youn, Sang-Soo Kim, Dong-Gyu Kim
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Patent number: 8563368Abstract: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.Type: GrantFiled: February 4, 2013Date of Patent: October 22, 2013Assignee: Samsung Display Co., Ltd.Inventors: Young-Wook Lee, Hong-Suk Yoo, Jean-Ho Song, Jae-Hyoung Youn, Woo-Geun Lee, Ki-Won Kim, Jong-In Kim
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Patent number: 8389998Abstract: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.Type: GrantFiled: April 11, 2012Date of Patent: March 5, 2013Assignee: Samsung Display Co., Ltd.Inventors: Young-Wook Lee, Hong-Suk Yoo, Jean-Ho Song, Jae-Hyoung Youn, Woo-Geun Lee, Ki-Won Kim, Jong-In Kim
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Publication number: 20130001567Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.Type: ApplicationFiled: September 5, 2012Publication date: January 3, 2013Inventors: Sung-Ryul KIM, Jean-Ho Song, Jae-Hyoung Youn, O-Sung Seo, Byeong-Beom Kim, Je-Hyeong Park, Jong-In Kim, Jae-Jin Song
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Patent number: 8304299Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.Type: GrantFiled: June 23, 2010Date of Patent: November 6, 2012Assignee: Samsung Display Co., Ltd.Inventors: Sung-Ryul Kim, Jean-Ho Song, Jae-Hyoung Youn, O-Sung Seo, Byeong-Beom Kim, Je-Hyeong Park, Jong-In Kim, Jae-Jin Song
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Patent number: 8242506Abstract: An array substrate includes a base substrate, a gate line, a gate insulation layer, a data line, a thin-film transistor (“TFT”) and a pixel electrode. The gate line includes a gate covering line formed in a first direction on the base substrate and a gate main line protruded from the gate covering line. The gate insulation layer is formed on the base substrate to cover the gate line. The data line is formed on the gate insulation layer in a second direction crossing the first direction. The TFT is electrically connected to the gate line and the data line. The pixel electrode is electrically connected to the TFT. Therefore, a gate line is thicker than a gate covering line and a gate main line having a low resistance is further formed, so that a gate signal may be quickly transferred along the gate line without a signal delay.Type: GrantFiled: November 19, 2008Date of Patent: August 14, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jang-Soo Kim, Jae-Hyoung Youn
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Publication number: 20120194414Abstract: A liquid crystal display to prevent light leakage with an improvement of aperture ratio and a reduction of load of a data line is provided. The liquid crystal display includes a gate line and a storage electrode line formed on a insulating substrate and apart from each other, a first data line and a second data line intersecting the gate line, a first pixel electrode defined by the gate line and the first data line, and a second pixel electrode defined by the gate line and the second data line and neighboring the first pixel electrode. Also, a blocking electrode between the first pixel electrode and the second pixel electrode is included, wherein at least portion of the first data line is disposed under the first pixel electrode, and at least portion of the blocking electrode is disposed under the second pixel electrode and apart from the first data line.Type: ApplicationFiled: March 13, 2012Publication date: August 2, 2012Inventors: Woo-Geun LEE, Shi-Yul Kim, Jae-Hyoung Youn, Young-Wook Lee
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Publication number: 20120193634Abstract: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.Type: ApplicationFiled: April 11, 2012Publication date: August 2, 2012Inventors: Young-Wook Lee, Hong-Suk Yoo, Jean-Ho Song, Jae-Hyoung Youn, Woo-Geun Lee, Ki-Won Kim, Jong-In Kim
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Patent number: 8218110Abstract: After increasing the thickness of a gate line and forming a barrier rib that is made of an organic material, a gate insulating layer is formed and then a color filter is formed with an Inkjet method using the barrier rib. By increasing a thickness of the gate line, even if the size of a substrate increases, problems due to signal delay are reduced, and by forming a barrier rib with an organic material, the height of the barrier rib increases, and a taper angle increases and thus a color filter is stably formed.Type: GrantFiled: May 4, 2009Date of Patent: July 10, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jean-Ho Song, Yang-Ho Jung, Hoon Kang, Jae-Sung Kim, Jae-Hyoung Youn, Jong-In Kim, Sang-Soo Kim, Shi-Yul Kim
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Patent number: 8174020Abstract: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.Type: GrantFiled: September 9, 2009Date of Patent: May 8, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Wook Lee, Hong-Suk Yoo, Jean-Ho Song, Jae-Hyoung Youn, Woo-Geun Lee, Ki-Won Kim, Jong-In Kim