Abstract: A display device includes a first semiconductor layer disposed on a substrate; a first insulating layer disposed on the first semiconductor layer; a scan line disposed on the first insulating layer; a second insulating layer on the scan line; an inverted scan line on the second insulating layer; a third insulating layer disposed on the inverted scan line; a second semiconductor layer disposed on the third insulating layer; a fourth insulating layer disposed on the second semiconductor layer; an initializing voltage line disposed on the fourth insulating layer and overlapping the scan line; a first transistor including a channel disposed in the first semiconductor layer and receiving a gate signal through the scan line; and a second transistor including a channel disposed in the second semiconductor layer and receiving a gate signal through the inverted scan line.

Abstract: Provided is a jetting driver that can be used for various types of heads with minimal changes. The jetting driver includes: an image board receiving raw image data and generating image data by transforming the raw image data into a form suitable for a type of heads used; and an interface board physically separated from the image board, receiving the image data, and transmitting the image data to the heads through a plurality of channels.

Abstract: A computer-implemented database system for storing data relating to a series of events may include a memory storing instructions and at least one processor configured to execute the instructions to perform a process. The process may include receiving data relating to a first return request initiated by a first customer via a first user device, and creating a first data structure for the first return request into a first database. The process may also include create a first event for the first return request, and storing the first event in the first data structure. The process may further include receiving data relating to an update associated with the first return request, creating a second event for the update, and inserting the second event into the first data structure.

Abstract: A system for editing workflows as described herein, which may include a memory storing instructions and at least one processor configured to execute instructions. The instructions may cause the processor to display, on a graphical user interface an existing workflow, wherein the workflow comprises a plurality of blocks. Edits to the plurality of blocks may be received from a user, wherein edits comprise at least edits to an individual block or an interconnection between the plurality of blocks. Further, a modified workflow based on the received edits may be created and propagated to replace existing workflows within the system. Lastly, a graphical user interface may display the modified workflows for further editing.

Abstract: A system for editing workflows as described herein, which may include a memory storing instructions and at least one processor configured to execute instructions. The instructions may cause the processor to display, on a graphical user interface an existing workflow, wherein the workflow comprises a plurality of blocks. Edits to the plurality of blocks may be received from a user, wherein edits comprise at least edits to an individual block or an interconnection between the plurality of blocks. Further, a modified workflow based on the received edits may be created and propagated to replace existing workflows within the system. Lastly, a graphical user interface may display the modified workflows for further editing.

Abstract: A computer-implemented database system for storing data relating to a series of events may include a memory storing instructions and at least one processor configured to execute the instructions to perform a process. The process may include receiving data relating to a first return request initiated by a first customer via a first user device, and creating a first data structure for the first return request into a first database. The process may also include create a first event for the first return request, and storing the first event in the first data structure. The process may further include receiving data relating to an update associated with the first return request, creating a second event for the update, and inserting the second event into the first data structure.

Abstract: A semiconductor package includes a first semiconductor chip and a second semiconductor chip which are disposed side-by-side on a surface of a package substrate. A heat insulation wall is disposed between the first semiconductor chip and the second semiconductor chip. The heat insulation wall thermally isolates the first semiconductor chip from the second semiconductor chip.

Abstract: A computer-implemented database system for storing data relating to a series of events may include a memory storing instructions and at least one processor configured to execute the instructions to perform a process. The process may include receiving data relating to a first return request initiated by a first customer via a first user device, and creating a first data structure for the first return request into a first database. The process may also include create a first event for the first return request, and storing the first event in the first data structure. The process may further include receiving data relating to an update associated with the first return request, creating a second event for the update, and inserting the second event into the first data structure.

Abstract: A system for editing workflows as described herein, which may include a memory storing instructions and at least one processor configured to execute instructions. The instructions may cause the processor to display, on a graphical user interface an existing workflow, wherein the workflow comprises a plurality of blocks. Edits to the plurality of blocks may be received from a user, wherein edits comprise at least edits to an individual block or an interconnection between the plurality of blocks. Further, a modified workflow based on the received edits may be created and propagated to replace existing workflows within the system. Lastly, a graphical user interface may display the modified workflows for further editing.

Abstract: A semiconductor package includes a first semiconductor chip and a second semiconductor chip which are disposed side-by-side on a surface of a package substrate. A heat insulation wall is disposed between the first semiconductor chip and the second semiconductor chip. The heat insulation wall thermally isolates the first semiconductor chip from the second semiconductor chip.

Abstract: A semiconductor package includes a first semiconductor chip and a second semiconductor chip which are disposed side-by-side on a surface of a package substrate. A heat insulation wall is disposed between the first semiconductor chip and the second semiconductor chip. The heat insulation wall thermally isolates the first semiconductor chip from the second semiconductor chip.

Abstract: A semiconductor package includes a first semiconductor chip and a second semiconductor chip which are disposed side-by-side on a surface of a package substrate. A heat insulation wall is disposed between the first semiconductor chip and the second semiconductor chip. The heat insulation wall thermally isolates the first semiconductor chip from the second semiconductor chip.

Abstract: The disclosure relates to a semiconductor chip and a stacked type semiconductor package having the same. The semiconductor chip includes: a semiconductor chip body having a first surface formed with a plurality of bonding pads and a second surface which is opposite to the first surface, a plurality of first and second through electrodes that pass through the semiconductor chip body and one ends thereof are electrically connected to the bonding pads, an insulating layer formed over the second surface of the semiconductor chip body such that the other ends of the first and second through electrodes are not covered by the insulating layer, and a first heat spreading layer formed over the insulating layer.

Abstract: The disclosure relates to a semiconductor chip and a stacked type semiconductor package having the same. The semiconductor chip includes: a semiconductor chip body having a first surface formed with a plurality of bonding pads and a second surface which is opposite to the first surface, a plurality of first and second through electrodes that pass through the semiconductor chip body and one ends thereof are electrically connected to the bonding pads, an insulating layer formed over the second surface of the semiconductor chip body such that the other ends of the first and second through electrodes are not covered by the insulating layer, and a first heat spreading layer formed over the insulating layer.

Abstract: A stack package having a plurality of stacked chips includes first voltage dropping units respectively formed in the plurality of chips, the first voltage dropping units are electrically coupled by a first line; second voltage dropping units respectively formed in the plurality of chips, the second dropping units are electrically coupled by a second line; first signal generation units respectively formed in the plurality of chips, each of the first signal generation units is connected to an output node of the first voltage dropping units, respectively; and second signal generation units respectively formed in the plurality of chips, each of the second signal generation units is connected to an input node of the second voltage dropping units, respectively.

Abstract: A stack package includes a first package having a first semiconductor chip and a first encapsulation member which seals the first semiconductor chip. A second package is stacked on the first package, and includes a second semiconductor chip and a second encapsulation member which seals the second semiconductor chip. Flexible conductors are disposed within the first encapsulation member of the first package in such a way as to electrically connect the first package and the second package.

Abstract: An opener and a buffer table for a test handler are disclosed. The opener includes an opening plate, a plurality of pin blocks forming pairs, and at least one or more interval retaining apparatus for retaining an interval between the pin blocks forming a pair. Each of the pin blocks is movably coupled to the opening plate, and includes opening pins for releasing a holding state of a holding apparatus that holds semiconductor devices in a carrier board. Although semiconductor devices to be tested are altered in size and a carrier board loading with the semiconductor devices is thus replaced, the opener does not need to be replaced, thereby reducing the replacement cost and the waste of resources.

Abstract: An insert for a carrier board of a test handler is disclosed. In a first aspect, the latch block applying to the insert is detachably coupled to the insert body. The latch block can be reused, and thus this reduces wastage of resources and eliminates the insert replacement fee. In a second aspect, the insert pocket having hooks is detachably coupled to the insert body. The insert body can be reused. The latch unit is installed to the insert pocket, so that the damaged latch unit can be easily replaced. The insert forms a plurality of holes in the bottom of the loading part thereof, to expose the leads of the semiconductor devices through the holes downwardly. Thus, the insert can load semiconductor devices regardless of the dimensions of the semiconductor devices.

Abstract: A phase change random access memory (PCRAM) device and method of manufacturing the same are provided. The PCRAM includes bottom electrode contacts formed on a semiconductor substrate that includes a lower structure, phase-change material patterns in contact with the bottom electrode contacts, respectively, and heat insulating units formed between the phase-change material patterns.

Abstract: A stack package includes a first package having a first semiconductor chip and a first encapsulation member which seals the first semiconductor chip. A second package is stacked on the first package, and includes a second semiconductor chip and a second encapsulation member which seals the second semiconductor chip. Flexible conductors are disposed within the first encapsulation member of the first package in such a way as to electrically connect the first package and the second package.