Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.

Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.

Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and LED packages are disclosed. LED packages are provided with improved thermal and/or electrical coupling between LED chips and submounts or lead frames. Various configurations of submounts with via arrangements are disclosed to provide improved coupling between LED chips and submounts. LED chip contacts are disclosed with one or more openings that are registered with vias to provide more uniform mounting. Multiple LED chips may be arranged around a thermally conductive element on a submount, and a via in the submount may be registered with the thermally conductive element. Subassemblies are provided between LED chips and lead frames to improve electrical and thermal coupling. Underfill materials may be arranged between LED chips and lead frames to provide improved mechanical support.

Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and LED packages are disclosed. LED packages are provided with improved thermal and/or electrical coupling between LED chips and submounts or lead frames. Various configurations of submounts with via arrangements are disclosed to provide improved coupling between LED chips and submounts. LED chip contacts are disclosed with one or more openings that are registered with vias to provide more uniform mounting. Multiple LED chips may be arranged around a thermally conductive element on a submount, and a via in the submount may be registered with the thermally conductive element. Subassemblies are provided between LED chips and lead frames to improve electrical and thermal coupling. Underfill materials may be arranged between LED chips and lead frames to provide improved mechanical support.

Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.

Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and LED packages are disclosed. LED packages are provided with improved thermal and/or electrical coupling between LED chips and submounts or lead frames. Various configurations of submounts with via arrangements are disclosed to provide improved coupling between LED chips and submounts. LED chip contacts are disclosed with one or more openings that are registered with vias to provide more uniform mounting. Multiple LED chips may be arranged around a thermally conductive element on a submount, and a via in the submount may be registered with the thermally conductive element. Subassemblies are provided between LED chips and lead frames to improve electrical and thermal coupling. Underfill materials may be arranged between LED chips and lead frames to provide improved mechanical support.