Patents by Inventor Jae Jeon

Jae Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050250786
    Abstract: This application relates to monomers of the general formula (I) for the preparation of PNA (peptide nucleic acid) oligomers and provides method for the synthesis of both predefined sequence PNA oligomers and random sequence PNA oligomers: wherein E is nitrogen or C—R?; J is sulfur or oxygen; R?, R1, R2, R3, R4 is independently H, halogen, alkyl, nitro, nitrite, alkoxy, halogenated alkyl, halogenated alkoxy, phenyl or halogenated phenyl, R5 is H or protected or unprotected side chain of natural or unnatural ?-amino acid; and B is a natural or unnatural nucleobase, wherein when said nucleobase has an exocyclic amino function, said function is protected by protecting group which is labile to acids but stable to weak to medium bases in the presence of thiol.
    Type: Application
    Filed: July 15, 2005
    Publication date: November 10, 2005
    Inventors: Sung Kim, Hyunil Lee, Jong Lim, Hoon Choi, Jae Jeon, Sahn Ahn, Sung Lee, Won Yoon
  • Publication number: 20050198912
    Abstract: Disclosed herein is a polishing slurry for chemical mechanical polishing. The polishing slurry comprises polishing particles, which have a particle size distribution including separated fine and large polishing particle peaks. The polishing slurry also comprises polishing particles, which have a median size of 50-150 nm. The present invention provides the slurry having an optimum polishing particle size, in which the polishing particle size is controlled and which is useful to produce semiconductors having fine design rules by changing the production conditions of the slurry. The present invention also provides the polishing slurry and a method of producing the same, in which a desirable CMP removal rate is assured and scratches are suppressed by controlling a polishing particle size distribution, and a method of polishing a substrate.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 15, 2005
    Applicants: K.C. TECH CO., LTD., IUCF-HYU
    Inventors: Dae Kim, Seok Hong, Jae Jeon, Ho Kim, Hyun Park, Un Paik, Jae Park, Yong Kim
  • Publication number: 20050093598
    Abstract: A delay-locked loop circuit includes a phase frequency detector, a charge pump, a loop filter, a voltage controlled delay line and a coarse lock detector. The phase frequency detector generates an up signal and a down signal corresponding to phase and frequency differences between an input clock signal and a feedback signal. The charge pump receives the up signal, the down signal and a coarse lock detection signal to generate a current signal. The loop filter receives and filters the current signal through a low-pass filter to generate a direct voltage signal. The voltage controlled delay line receives the input clock signal and the direct voltage signal to generate the feedback signal and control signals. The coarse lock detector receives the control signals to generate the initialization signal and the coarse lock detection signal to adjust Td within Tin/2<Td<2×Tin when Td?2×Tin or Td?Tin/2.
    Type: Application
    Filed: October 14, 2004
    Publication date: May 5, 2005
    Inventors: Phil-Jae Jeon, Doh-Young Kim
  • Publication number: 20050073343
    Abstract: A phase-locked loop circuit including a lock detection function is disclosed. The phase-locked loop circuit comprises a lock detection circuit. The lock detection circuit includes a lock-detection-start-signal generator, a lock-detection-clock generator, and a lock-detection-signal generator. The lock-detection-start-signal generates a lock detection start signal when the pulse width of an up signal and a down signal reaches a predetermined value. The lock-detection-clock generator generates a lock detection clock signal on the basis of the up signal and the down signal. The lock-detection-signal generator counts the lock detection clock signal, and generates the lock detection signal. The phase-locked loop circuit is capable of discriminating the operating regions thereof and outputting a lock detection signal when the locking of phase is completed.
    Type: Application
    Filed: October 6, 2004
    Publication date: April 7, 2005
    Inventors: Woo-Seok Kim, Phil-Jae Jeon
  • Publication number: 20050040876
    Abstract: A clock generator based on a phase-locked loop with one pole and an improved period jitter characteristic is disclosed. The clock generator comprises a phase detector for generating a phase detection signal and a phase error signal, a charge pump for generating a loop control voltage, a loop filter for generating an integrated voltage signal, a voltage-controlled oscillator for generating multi-phase output signals, and a phase error compensating circuit for compensating a phase error generated at a prior input clock. The clock generator has an improved period jitter characteristic by compensating a phase error generated at a prior input clock.
    Type: Application
    Filed: August 11, 2004
    Publication date: February 24, 2005
    Inventor: Phil-Jae Jeon
  • Publication number: 20040217142
    Abstract: An apparatus for cutting a liquid crystal display panel includes a cutting wheel having a spindle shape substantially corresponding to two conical shapes being attached to each other at circular bottom surfaces, a cutting blade along a central portion of the cutting wheel, a holder to which the cutting wheel is mounted, and a support part at the holder, the support part fixing and supporting the cutting wheel.
    Type: Application
    Filed: April 27, 2004
    Publication date: November 4, 2004
    Applicants: LG.Philips LCD Co., Ltd., Top Engineering Co., Ltd.
    Inventors: Yung-Chul Kwon, Jung-Sik Kim, Jong-Yull Park, Kyu-Jae Jeon
  • Publication number: 20040206197
    Abstract: A sliding mechanism includes at least one member adapted to slide along at least one body wall. The body wall and the sliding member are adapted to mate in at least one designated location when the sliding member is pushed into frictional sliding contact with the body wall from an initial location. A motion detector is operatively coupled to the sliding member. A controller is operatively coupled to the motion detector and adapted to determine whether the sliding member has moved from the initial location to the designated location based on input from the motion detector.
    Type: Application
    Filed: April 14, 2004
    Publication date: October 21, 2004
    Applicant: LG Electronics Inc.
    Inventor: Youn Jae Jeon
  • Publication number: 20040162884
    Abstract: A home network system and a method of providing operation history data for the same are disclosed. The home network system includes at least one slave device and a master device, which includes a microprocessor, a memory, and a display unit. The microprocessor repeatedly sends a status request signal to the slave device and receives one or more response signal from the slave device in response to the request signal. The microprocessor constructs an operation history database in the memory by accumulatively storing operation status data included in each response signal. Finally, the microprocessor extracts data from the database when requested by a user, and the display unit displays the extracted data.
    Type: Application
    Filed: February 13, 2004
    Publication date: August 19, 2004
    Inventor: Young Jae Jeon
  • Patent number: 6703902
    Abstract: A phase locked loop (PLL) for reducing electromagnetic interference (EMI) is provided. The PLL is not sensitive to a manufacturing process, consumes less power, occupies a small layout space, and can flexibly control a modulation frequency and a modulation rate flexibly. The PLL for reducing the EMI controls the signals having a phase difference, which is n-times (where n is an integer) the basic delay time of the output signals from a voltage controlled oscillator (VCO), and determines the modulation rate. Then, the PLL repeats the procedure during the cycle of a pre-defined modulation frequency. The PLL for reducing the EMI not only reduces the EMI, but also does not require a ROM. Therefore, the layout space can be reduced and broad frequency ranges can be obtained. In addition, since the phase difference of the output signals of the VCO is controlled by logic circuits, the PLL is insensitive to changes in the manufacturing process.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: March 9, 2004
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Phil-Jae Jeon, Myoung-su Lee
  • Publication number: 20030159323
    Abstract: Provided is an advertisement apparatus using a light switching device which transmits or shields light according as a power source or heat is supplied or not. The advertisement apparatus includes a light switching device transmitting light when a power source or heat is supplied thereto and shielding light of less than predetermined brightness when a power source or heat is not supplied thereto, or operating in a reverse manner, and an illuminator for illuminating an image onto the light switching device with light whose brightness is greater than the predetermined brightness. The light switching device can be used as the window of a building, and can present images of an advertisement using the illuminator for irradiating light from a projector, for example, to the light switching device. Therefore, the advertisement apparatus using a light switching device can be used for both indoor and outdoor advertising displays.
    Type: Application
    Filed: April 3, 2003
    Publication date: August 28, 2003
    Inventor: Young Jae Jeon
  • Patent number: 6579470
    Abstract: A polymer assemble liquid crystal includes equal to or less than 40 wt % of a liquid crystal mixture of ferroelectric and antiferroelectric liquid crystals and equal to or more than 60 wt % of a polymer. The polymer is obtained by polymerizing urethane acrylate oligomer and (meth)acrylate. A ratio of the ferroelectric liquid crystal to the antiferroelectric liquid crystal in the liquid crystal mixture is about 3:1.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: June 17, 2003
    Assignee: D.D. Tech, Inc.
    Inventor: Young-Jae Jeon
  • Publication number: 20030058053
    Abstract: A phase locked loop (PLL) for reducing electromagnetic interference (EMI) is provided. The PLL is not sensitive to a manufacturing process, consumes less power, occupies a small layout space, and can flexibly control a modulation frequency and a modulation rate flexibly. The PLL for reducing the EMI controls the signals having a phase difference, which is n-times (where n is an integer) the basic delay time of the output signals from a voltage controlled oscillator (VCO), and determines the modulation rate. Then, the PLL repeats the procedure during the cycle of a pre-defined modulation frequency. The PLL for reducing the EMI not only reduces the EMI, but also does not require a ROM. Therefore, the layout space can be reduced and broad frequency ranges can be obtained. In addition, since the phase difference of the output signals of the VCO is controlled by logic circuits, the PLL is insensitive to changes in the manufacturing process.
    Type: Application
    Filed: September 24, 2002
    Publication date: March 27, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Phil-Jae Jeon, Myoung-Su Lee
  • Patent number: 5582766
    Abstract: A cholesteric liquid crystal compound containing a central biphenyl ester group having a rigid central group, increased molecular stability and a wide liquid crystalline phase temperature range. Accordingly, display devices employing the cholesteric liquid crystal compound can be operated at high temperatures and has good multi-color characteristics.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: December 10, 1996
    Assignee: Samsung Display Devices Co., Ltd.
    Inventor: Young-jae Jeon