Abstract: A gate driver includes a plurality of stage circuits to output a clock signal from the outside as gate signals. A jth stage circuit includes an input unit to charge a first node at an initial voltage when a first input signal is input to a first input terminal, a buffer unit to output the clock signal as a gate signal to an output terminal when the initial voltage is supplied to the first node, a holding unit to maintain the first node at a reset power source level when the clock signal is supplied to the holding unit, and an inverter unit to supply the clock signal or the reset power source to the holding unit. The input unit maintains the first node at a second input signal input voltage to a second input terminal when a third input signal is input to a third input terminal.

Abstract: A light sensitive circuit includes a light sensing capacitor and a driving transistor. The light sensing capacitor is configured to sense light of a predetermined one or more wavelengths. The driving transistor includes a gate electrode electrically connected to the light sensing capacitor and is configured to generate a light sensing current according to a voltage of the gate electrode in the driving transistor. A light sensing accuracy and a light sensing signal to noise ratio (SNR) of the display apparatus including a plurality of such light sensing capacitors may be improved relative to ones that do not include such light sensing capacitors.

Abstract: A display device including a first base substrate, gate lines disposed on the first base substrate and extending in a first direction, parasitic capacitance electrodes coupled to the gate lines, data lines extending in a second direction crossing the first direction, transistors, each coupled to one of the gate lines and coupled to one of the data lines, and pixels sequentially arranged in the first direction, each of the pixels coupled to a corresponding one of the transistors, respectively, in which each of the transistors includes a gate electrode, a source electrode, and a drain electrode, and wherein widths of the parasitic capacitance electrodes in adjacent pixels measured along the first direction are different from each other.

Abstract: A pixel includes: an organic light emitting diode including a cathode electrode connected to a second power source; a first transistor including a first electrode connected to a first power source, and to control an amount of current flowing from the first power source to the second power source via the organic light emitting diode in response to a data signal; a plurality of second transistors connected in series between a gate electrode of the first transistor and an initialization power source, and to be turned on when a scan signal is supplied to an i?1-th (i is a natural number) scan line; and a first capacitor connected between a voltage source and a first node, the first node being between the plurality of second transistors.

Abstract: An image processor includes a scaling unit configured to output converted data by resizing first image data; and a rendering unit configured to receive second image data, to output rendering data by rendering the second image data, and to calculate a target rendering data value based on data values corresponding to a first block of M*N among the second image data, where each of M and N is an integer greater than or equal to 2. Here, the second image data is the converted data, or the first image data is the rendering data.

Abstract: A display substrate includes a base substrate including a display area in which signal lines and pixels are arranged and a peripheral area surrounding the display area, pads disposed in the peripheral area and receiving an electrical signal, fan-out lines connecting the pads and the signal lines, and static electricity breakup circuits comprising a breakup line that crosses the fan-out lines, and static electricity prevention circuits respectively connected to the fan-out lines. Parts of the static electricity prevention circuits are connected to adjacent fan-out lines and are commonly connected to the one of the breakup lines through a common contact part.

Abstract: A scan driver includes a plurality of decoder type stages respectively outputting a plurality scan signals. An n-th stage includes a first input block configured to provide a first DC voltage to a first node in response to a plurality of selection signals, a pull-down block configured to pull down a first node voltage, a second input block configured to reduce a voltage drop of a second node voltage when a scan signal is output, and to provide a second DC voltage to a second node in response to the selection signals, a buffer block configured to output the first node voltage, that is a buffer output voltage, in response to the first node voltage and the second node voltage, and an output block configured to output the scan signal.

Abstract: A head mounted display system includes an infrared sensor generating an infrared image, an image processor measuring a position of a user pupil based on the infrared image and generating image source based on the position of the user pupil, and an organic light emitting display device displaying an image corresponding to the image source. The organic light emitting display device includes a display panel and a panel driver. The display panel includes a plurality of infrared pixels disposed in an infrared emission region, the infrared pixels emitting infrared light, and a plurality of display pixels disposed in a display region, the display pixels emitting visible light. The panel driver provides driving signals to the infrared pixels and the display pixels.

Abstract: A gate circuit according to an exemplary embodiment of the present inventive concept comprises a plurality of stages, each receiving a clock signal and outputting a gate signal and a carry signal. One of the plurality of stages includes a first transistor of which a first terminal and a control terminal are connected to each other and a carry signal of a stage before previous stage is input to the first terminal and the control terminal and a second transistor of which a gate signal of the previous stage is input to a first terminal, a control terminal is connected with a second terminal of the first transistor, and an output terminal is connected to a first node.

Abstract: A display device includes a first display region, a second display region, a first lens, and a second lens. The first display region includes a first pixel subset and may display a first image. The first image includes a first sub-image corresponding to the first pixel subset and smaller than the first image. The second display region neighbors the first display region, includes a second pixel subset, and may display a second image. The second image includes a second sub-image corresponding to the second pixel subset and smaller than the second image. The second pixel subset is not identical to the first pixel subset. The first lens may show the first sub-image without providing the entire first image. The second lens may show the second sub-image without providing the entire second image when the first lens shows the first sub-image.

Abstract: An integration driver includes a plurality of stages. Each of the plurality of stages includes a scan signal generator including first to third nodes and a fifth node and an emission control signal generator including a fourth node and sixth node. The scan signal generator is configured to generate a first signal provided to a first node, a second signal provided to a second node, and a third signal provided to a third node using a first clock signal, a second clock signal, and a start signal or a carry signal, and generate a scan signal using the second signal and the third signal. The emission control signal generator is configured to generate a fourth signal provided to a fourth node using the third signal and the second clock signal, and generate an emission control signal using the first signal and the fourth signal.

Abstract: A display device includes a display area including a gate line and a data line and a gate driver connected to an end of the gate line, the gate driver including at least one stages integrated on a substrate configured to output a gate voltage, in which the stage includes an inverter unit and an output unit, in which the output unit includes a first transistor and a first capacitor. The first transistor includes an input terminal applied with a clock signal, a control terminal connected to the node Q, and an output terminal connected to a gate voltage output terminal through which the gate voltage is output. An inverter voltage output from the inverter is lower than the low voltage of the gate voltage output by the output unit.

Abstract: A demultiplexer includes: a first transistor connected between a data input terminal and a first output terminal; a second transistor connected between the data input terminal and a second output terminal; and a first pre-charge circuit connected to a gate electrode of the first transistor, the first pre-charge circuit including: a third transistor and a first diode connected between a first clock input terminal and the gate electrode of the first transistor in parallel; and a first capacitor connected between a second clock input terminal and the gate electrode of the first transistor.

Abstract: A display device includes: a display unit including a plurality of pixels, each of the pixels including: an OLED; and a driving transistor to supply current to an anode of the OLED according to a voltage applied to a gate of the driving transistor and a power supply voltage; a scan driver to supply scan signals to the pixels; an initialization driver to supply initializing signals to the pixels; a data driver to supply data signals to the pixels; light emission drivers to supply first and second light emission signals to the pixels; and a power supply to supply the power supply voltage and an initialization voltage to the pixels, wherein the initialization voltage is supplied to the anode during a first period, and the power supply voltage corresponding to a threshold voltage of the driving transistor is supplied to the gate during a first sub-period of the first period.

Abstract: A stage circuit includes a first driver, a second driver, a first output unit, a second output unit and a controller. The first driver controls voltages of first and second nodes, according to a first power source, a third power source, a start signal or a carry signal of a previous stage input to a first input terminal, and a clock signal supplied to a second input terminal. The second driver controls voltages of third and fourth nodes, according to voltages of the first power source, the third power source, the first input terminal and the first and second nodes. The first output unit outputs a carry signal to a first output terminal, according to voltages of the first power source, the second input terminal and the third and fourth nodes. The second output unit outputs a scan signal to a second output terminal, according to voltages of the second power source, the second input terminal and the third and fourth nodes. The controller is electrically coupled to the first output terminal and the second driver.

Abstract: A pixel circuit and an OLED display including the same are disclosed. The pixel circuit includes a driving transistor having a double gate structure, the driving transistor including a first gate electrode electrically connected to a first node, a second gate electrode electrically connected to a second node, a first electrode electrically connected to a first power supply voltage, and a second electrode electrically connected to the anode of the OLED. The pixel circuit also includes a switching transistor including a gate electrode configured to receive a scan signal, a first electrode configured to receive a data voltage, and a second electrode electrically connected to the first node. The pixel circuit further includes a storage capacitor and a compensation capacitor including a first electrode electrically connected to the second node and a second electrode electrically connected to the first electrode of the driving transistor.

Abstract: A light sensitive circuit includes a light sensing capacitor and a driving transistor. The light sensing capacitor is configured to sense light of a predetermined one or more wavelengths. The driving transistor includes a gate electrode electrically connected to the light sensing capacitor and is configured to generate a light sensing current according to a voltage of the gate electrode in the driving transistor. A light sensing accuracy and a light sensing signal to noise ratio (SNR) of the display apparatus including a plurality of such light sensing capacitors may be improved relative to ones that do not include such light sensing capacitors.

Abstract: A coupling compensator for a display panel and a display device including the coupling compensator are disclosed. In one aspect, the coupling compensator includes a memory configured to receive grayscale data and store the grayscale data and a first data converter configured to convert the grayscale data to a plurality of grayscale data voltages including first and second grayscale data voltages. The compensator also includes a coupling voltage calculator configured to calculate a line coupling voltage generated on a data line based on the difference between the first grayscale data voltage corresponding to the grayscale data provided to a first group of the pixels in an (N?1)th row and the second grayscale data voltage corresponding to the grayscale data provided to a first group of the pixels in an Nth row, where the N is an integer equal to or greater than 2.

Abstract: A light sensitive circuit includes a light sensing capacitor and a driving transistor. The light sensing capacitor is configured to sense light of a predetermined one or more wavelengths. The driving transistor includes a gate electrode electrically connected to the light sensing capacitor and is configured to generate a light sensing current according to a voltage of the gate electrode in the driving transistor. A light sensing accuracy and a light sensing signal to noise ratio (SNR) of the display apparatus including a plurality of such light sensing capacitors may be improved relative to ones that do not include such light sensing capacitors.

Abstract: A gate driver includes a plurality of stages connected to each other in a cascade manner, where each of the stages includes an input unit which connects a first input terminal and a first node and includes a first input transistor and a second input transistor, where an output terminal of the first input transistor and an input terminal of the second input transistor are connected to a second node, and the input unit further includes a storage capacitor which connects the first input terminal and the second node.