Patents by Inventor Jae Kwan Kwon
Jae Kwan Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240166801Abstract: The present invention relates to a biodegradable copolymer polyester resin comprising an anhydrosugar alcohol and an anhydrosugar alcohol-alkylene glycol and a method for preparing same and, more specifically, to a polyester resin and a method for preparing same, wherein the polyester resin is excellent in color value and biodegradability as well as heat resistance and mechanical properties, by copolymerizing specific contents of a dicarboxyl component containing adipic acid or an ester thereof and a diol component containing an anhydrosugar alcohol and an anhydrosugar alcohol-alkylene glycol.Type: ApplicationFiled: October 29, 2020Publication date: May 23, 2024Applicant: SAMYANG CORPORATIONInventors: Min Sun LEE, Jae Kwan KWON, Mi Ran KIM, Yun Ju CHANG, Young Do KWON, Hoon RYU
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Patent number: 11550492Abstract: Provided herein may be a semiconductor memory device, a controller, and a memory system having the same. By means of a method of operating the controller of the memory system, the semiconductor memory device, which is included in the memory system and including a plurality of memory blocks, is controlled. The method of operating the controller may include sensing a power-on state of the memory system, and performing an erased block scan operation on the plurality of memory blocks using a scan read voltage, based on sensing that the memory system is in the power-on state. Each of memory cells in the plurality of memory blocks may store at least two bits of data, and the scan read voltage may enable an erase state and a program state of the memory cells to be distinguished from each other.Type: GrantFiled: March 17, 2021Date of Patent: January 10, 2023Assignee: SK hynix Inc.Inventor: Jae Kwan Kwon
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Patent number: 11453775Abstract: Disclosed are: a thermoplastic elastomer resin composition comprising a thermoplastic elastomer resin and, as a reactive additive, a compound containing one or more isocyanurate functional groups; a molded product comprising the same.Type: GrantFiled: December 27, 2018Date of Patent: September 27, 2022Assignee: SAMYANG CORPORATIONInventors: Jae-Kwan Kwon, Jin Yoo, Cheol-Han Lee, Yong-Chan Lim, Sang-Hyun Park
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Publication number: 20220083253Abstract: Provided herein may be a semiconductor memory device, a controller, and a memory system having the same. By means of a method of operating the controller of the memory system, the semiconductor memory device, which is included in the memory system and including a plurality of memory blocks, is controlled. The method of operating the controller may include sensing a power-on state of the memory system, and performing an erased block scan operation on the plurality of memory blocks using a scan read voltage, based on sensing that the memory system is in the power-on state. Each of memory cells in the plurality of memory blocks may store at least two bits of data, and the scan read voltage may enable an erase state and a program state of the memory cells to be distinguished from each other.Type: ApplicationFiled: March 17, 2021Publication date: March 17, 2022Inventor: Jae Kwan KWON
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Patent number: 10995212Abstract: The present invention relates to a thermoplastic polyether ester elastomer (TPEE) having a hard segment and a soft segment and a method for preparing the same and, more specifically, to a thermoplastic polyether ester elastomer and a method for preparing the same, wherein a unit derived from an anhydrosugar alcohol derivative with improved reactivity derived from biomass is contained in the soft segment, and thus through the adjustment of the content of the anhydrosugar alcohol derivative, elastic characteristics and physical characteristics (for example, hardness, etc.), which are important characteristics of an elastomer, can be favorably maintained, the melting point variously required in the molding process of a final product can be easily controlled, a problem of depletion of, especially, petroleum resources as finite resources, can be solved, and environmental friendliness can be improved.Type: GrantFiled: November 14, 2017Date of Patent: May 4, 2021Assignee: SAMYANG CORPORATIONInventors: Min Sun Lee, Mi Ran Kim, Yun Ju Chang, Jae Kwan Kwon, Cheol Han Lee, Young Do Kwon
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Publication number: 20210061991Abstract: Disclosed are: a thermoplastic elastomer resin composition comprising a thermoplastic elastomer resin and, as a reactive additive, a compound containing one or more isocyanurate functional groups; a molded product comprising the same.Type: ApplicationFiled: December 27, 2018Publication date: March 4, 2021Applicant: SAMYANG CORPORATIONInventors: Jae-Kwan KWON, Jin YOO, Cheol-Han LEE, Yong-Chan LIM, Sang-Hyun PARK
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Publication number: 20200071518Abstract: The present invention relates to a thermoplastic polyether ester elastomer (TPEE) having a hard segment and a soft segment and a method for preparing the same and, more specifically, to a thermoplastic polyether ester elastomer and a method for preparing the same, wherein a unit derived from an anhydrosugar alcohol derivative with improved reactivity derived from biomass is contained in the soft segment, and thus through the adjustment of the content of the anhydrosugar alcohol derivative, elastic characteristics and physical characteristics (for example, hardness, etc.), which are important characteristics of an elastomer, can be favorably maintained, the melting point variously required in the molding process of a final product can be easily controlled, a problem of depletion of, especially, petroleum resources as finite resources, can be solved, and environmental friendliness can be improved.Type: ApplicationFiled: November 14, 2017Publication date: March 5, 2020Applicant: SAMYANG CORPORATIONInventors: Min Sun LEE, Mi Ran KIM, Yun Ju CHANG, Jae Kwan KWON, Cheol Han LEE, Young Do KWON
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Patent number: 9419007Abstract: A semiconductor device includes a first vertical memory string connected to a common source line, a second vertical memory string connected to a bit line, a pipe transistor suitable for selectively connecting the first and second vertical memory strings based on a block selection signal, and a plurality of transistors suitable for selectively connecting local lines of the first and second vertical memory strings to corresponding global lines based on the block selection signal.Type: GrantFiled: December 15, 2014Date of Patent: August 16, 2016Assignee: SK Hynix Inc.Inventor: Jae Kwan Kwon
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Patent number: 9360877Abstract: A negative voltage regulation circuit includes an operational amplifier configured to receive a feedback voltage and an input voltage, a pull-up element configured to pull-up drive a first node based on output voltage of the operational amplifier, a load element coupled between the first node and a negative voltage terminal, a pull-down element configured to pull-down drive a final negative voltage output terminal using a voltage of the negative voltage terminal based on a voltage level of the first node, and a voltage division unit coupled between the final negative voltage output terminal and a pull-up voltage terminal, and configured to generate the feedback voltage by voltage division.Type: GrantFiled: July 10, 2014Date of Patent: June 7, 2016Assignee: SK Hynix Inc.Inventor: Jae-Kwan Kwon
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Patent number: 9360880Abstract: An integrated circuit includes a node setting block connected to a reference node and suitable for setting a voltage level of the reference node to a reference voltage level, a plurality of control voltage generation units connected in series to a reference node and suitable for generating a plurality of control voltages of which voltage level is variable and a current sensing circuit suitable for sensing a variation of a current flowing through a signal transmission line by using the plurality of control voltages, the signal transmission line connected to an internal circuit and a voltage level of the signal transmission line being fixed.Type: GrantFiled: December 16, 2013Date of Patent: June 7, 2016Assignee: SK Hynix Inc.Inventor: Jae-Kwan Kwon
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Publication number: 20160020217Abstract: A semiconductor device includes a first vertical memory string connected to a common source line, a second vertical memory string connected to a bit line, a pipe transistor suitable for selectively connecting the first and second vertical memory strings based on a block selection signal, and a plurality of transistors suitable for selectively connecting local lines of the first and second vertical memory strings to corresponding global lines based on the block selection signal.Type: ApplicationFiled: December 15, 2014Publication date: January 21, 2016Inventor: Jae Kwan KWON
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Publication number: 20140354260Abstract: An integrated circuit includes a node setting block connected to a reference node and suitable for setting a voltage level of the reference node to a reference voltage level, a plurality of control voltage generation units connected in series to a reference node and suitable for generating a plurality of control voltages of which voltage level is variable and a current sensing circuit suitable for sensing a variation of a current flowing through a signal transmission line by using the plurality of control voltages, the signal transmission line connected to an internal circuit and a voltage level of the signal transmission line being fixed.Type: ApplicationFiled: December 16, 2013Publication date: December 4, 2014Applicant: SK hynix Inc.Inventor: Jae-Kwan KWON
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Publication number: 20140320097Abstract: A negative voltage regulation circuit includes an operational amplifier configured to receive a feedback voltage and an input voltage, a pull-up element configured to pull-up drive a first node based on output voltage of the operational amplifier, a load element coupled between the first node and a negative voltage terminal, a pull-down element configured to pull-down drive a final negative voltage output terminal using a voltage of the negative voltage terminal based on a voltage level of the first node, and a voltage division unit coupled between the final negative voltage output terminal and a pull-up voltage terminal, and configured to generate the feedback voltage by voltage division.Type: ApplicationFiled: July 10, 2014Publication date: October 30, 2014Inventor: Jae-Kwan KWON
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Patent number: 8810306Abstract: A negative voltage regulation circuit includes an operational amplifier configured to receive a feedback voltage and an input voltage, a pull-up element configured to pull-up drive a first node based on output voltage of the operational amplifier, a load element coupled between the first node and a negative voltage terminal, a pull-down element configured to pull-down drive a final negative voltage output terminal using a voltage of the negative voltage terminal based on a voltage level of the first node, and a voltage division unit coupled between the final negative voltage output terminal and a pull-up voltage terminal, and configured to generate the feedback voltage by voltage division.Type: GrantFiled: March 14, 2013Date of Patent: August 19, 2014Assignee: SK Hynix Inc.Inventor: Jae-Kwan Kwon
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Publication number: 20140167839Abstract: A negative voltage regulation circuit includes an operational amplifier configured to receive a feedback voltage and an input voltage, a pull-up element configured to pull-up drive a first node based on output voltage of the operational amplifier, a load element coupled between the first node and a negative voltage terminal, a pull-down element configured to pull-down drive a final negative voltage output terminal using a voltage of the negative voltage terminal based on a voltage level of the first node, and a voltage division unit coupled between the final negative voltage output terminal and a pull-up voltage terminal, and configured to generate the feedback voltage by voltage division.Type: ApplicationFiled: March 14, 2013Publication date: June 19, 2014Applicant: SK HYNIX INC.Inventor: Jae-Kwan KWON
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Patent number: 8441867Abstract: A circuit for generating a pumping voltage in a semiconductor memory apparatus includes a control signal generation block configured to generate a first control signal obtained by level-shifting a voltage level of a test signal to a first driving voltage level, a voltage application section configured to supply an external voltage to a first node in response to a first transmission signal, a first charge pump configured to raise a voltage level of the first node by a first predetermined level in response to an oscillator signal, and a first pumping voltage output section configured to select at least one of a first connection unit and a second connection unit in response to the first control signal, and to interconnect the first node with a second node using the selected connection unit when a second transmission signal is enabled, wherein a first pumping voltage is output through the second node.Type: GrantFiled: October 10, 2011Date of Patent: May 14, 2013Assignee: SK hynix Inc.Inventor: Jae-Kwan Kwon
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Patent number: 8421523Abstract: A voltage supply circuit includes a pump voltage generator for generating an input voltage by changing a power source voltage to a desired level and changing a level of the input voltage according to a rising time of an operating voltage.Type: GrantFiled: December 2, 2011Date of Patent: April 16, 2013Assignee: SK Hynix Inc.Inventor: Jae Kwan Kwon
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Publication number: 20120139621Abstract: A voltage supply circuit includes a pump voltage generator for generating an input voltage by changing a power source voltage to a desired level and changing a level of the input voltage according to a rising time of an operating voltage.Type: ApplicationFiled: December 2, 2011Publication date: June 7, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Jae Kwan KWON
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Patent number: 8130012Abstract: A buffer circuit of a semiconductor integrated apparatus includes a control block configured to output a result of comparing an input voltage level and an output voltage level as a control signal, and a buffering block configured to generate an output voltage having the substantially same level as an input voltage in response to the control signal.Type: GrantFiled: December 30, 2008Date of Patent: March 6, 2012Assignee: Hynix Semiconductor Inc.Inventors: Jae-Kwan Kwon, Sung-Joo Ha
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Publication number: 20120032724Abstract: A circuit for generating a pumping voltage in a semiconductor memory apparatus includes a control signal generation block configured to generate a first control signal obtained by level-shifting a voltage level of a test signal to a first driving voltage level, a voltage application section configured to supply an external voltage to a first node in response to a first transmission signal, a first charge pump configured to raise a voltage level of the first node by a first predetermined level in response to an oscillator signal, and a first pumping voltage output section configured to select at least one of a first connection unit and a second connection unit in response to the first control signal, and to interconnect the first node with a second node using the selected connection unit when a second transmission signal is enabled, wherein a first pumping voltage is output through the second node.Type: ApplicationFiled: October 10, 2011Publication date: February 9, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Jae Kwan Kwon