Patents by Inventor Jae Kyeong Jeong

Jae Kyeong Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220130863
    Abstract: Disclosed are: a three-dimensional flash memory in which the degree of integration in a horizontal direction is improved so as to promote integration; and a manufacturing method therefor. A three-dimensional flash memory according to one embodiment comprises: at least one channel layer extending in one direction; at least one ferroelectric film used as a data storage place while being extended in the one direction so as to encompass the at least one channel layer; and a plurality of electrode layers stacked so as to be vertically connected to the at least one ferroelectric film.
    Type: Application
    Filed: December 26, 2019
    Publication date: April 28, 2022
    Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
    Inventors: Yun Heub SONG, Chang Wan CHOI, Jae Kyeong JEONG
  • Publication number: 20210408290
    Abstract: A thin film transistor and a non-volatile memory device are provided. The thin film transistor comprises a gate electrode, and a metal oxide channel layer traversing the upper or lower portions of the gate electrode. The metal oxide channel layer has semiconductor properties while having bixbyite crystals. An insulating layer is disposed between the gate electrode and the metal oxide channel layer. Source and drain electrodes are electrically connected to both ends of the metal oxide channel layer, respectively.
    Type: Application
    Filed: April 22, 2020
    Publication date: December 30, 2021
    Applicant: Industry- University Cooperation Foundation Hanyang University
    Inventors: Jae Kyeong JEONG, Hyun Ji YANG, Hyeon Joo SEUL
  • Publication number: 20210384221
    Abstract: Provided are a three-dimensional semiconductor memory device, a method for manufacturing the same, a method for operating the same, and an electronic system including the same. The three-dimensional semiconductor memory device includes a substrate, a stack structure on the substrate, and vertical channel structures, which are provided in channel holes penetrating the stack structure, wherein each of the vertical channel structures includes a data storage pattern, a vertical channel pattern, a conductive pad, and a vertical semiconductor pattern, wherein the vertical channel pattern includes a first portion contacting the upper surface of the substrate and a second portion provided between the data storage pattern and the vertical semiconductor pattern, and wherein the vertical semiconductor pattern is spaced apart from the substrate with the first portion of the vertical channel pattern therebetween.
    Type: Application
    Filed: May 25, 2021
    Publication date: December 9, 2021
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Yun Heub SONG, Sun Jun CHOI, Chang Hwan CHOI, Jae Kyeong JEONG
  • Publication number: 20210376233
    Abstract: Provided are a selection element which does not need an intermediate electrode and thus has improved integration, a phase-change memory device having the selection element, and a phase-change memory implemented so that the phase-change memory device has a highly integrated three-dimensional architecture.
    Type: Application
    Filed: May 23, 2019
    Publication date: December 2, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yun Heub SONG, Jae Kyeong JEONG
  • Patent number: 11183596
    Abstract: Provided is a thin film transistor including a source electrode, a drain electrode, and a channel layer connecting the source electrode and the drain electrode. The channel layer includes a tin-based oxide represented by SnMO, wherein M includes at least one of a non-metal chalcogen element or a halogen element.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: November 23, 2021
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jae Kyeong Jeong, Taikyu Kim, Baekeun Yoo
  • Publication number: 20210183886
    Abstract: Disclosed are a memory device based on an IGO channel layer and a method of fabricating the same. More particularly, the memory device according to an embodiment includes multilayers including at least one transition metal; and a channel layer formed adjacent to the multilayers and configured to include an indium gallium oxide (IGO) material.
    Type: Application
    Filed: October 30, 2020
    Publication date: June 17, 2021
    Applicant: IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
    Inventors: Chang Hwan Choi, Jae Kyeong Jeong, Soon Oh Jeong, Hoon Hee Han, Xuan Wang, Hyeon Joo Seul
  • Publication number: 20210104632
    Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.
    Type: Application
    Filed: December 17, 2020
    Publication date: April 8, 2021
    Inventors: Jae Kyeong JEONG, Yun Heub SONG, Chang Hwan CHOI, Hyeon Joo SEUL
  • Patent number: 10892366
    Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: January 12, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae Kyeong Jeong, Yun Heub Song, Chang Hwan Choi, Hyeon Joo Seul
  • Patent number: 10797149
    Abstract: Disclosed are a thin film transistor including a substrate and a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode formed on the substrate and a method of fabricating the thin film transistor, wherein the gate insulating film is made of a high dielectric ternary material, A2-XBXO3, wherein A is any one selected from the group consisting of aluminum, silicon, gallium, germanium, neodymium, gadolinium, vanadium, lutetium, and actinium, B is any one selected from the group consisting of yttrium, lanthanum, zirconium, hafnium, tantalum, titanium, vanadium, nickel, silicon, and ytterbium, and A is an element different from B. The gate insulating film may be formed through a solution process, and a high-quality insulating film may be obtained through heat treatment at low temperature.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: October 6, 2020
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jae Kyeong Jeong, Ji Won Lee
  • Publication number: 20200220025
    Abstract: Provided is a thin film transistor including a source electrode, a drain electrode, and a channel layer connecting the source electrode and the drain electrode. The channel layer includes a tin-based oxide represented by SnMO, wherein M includes at least one of a non-metal chalcogen element or a halogen element.
    Type: Application
    Filed: November 6, 2019
    Publication date: July 9, 2020
    Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jae Kyeong JEONG, Taikyu KIM, Baekeun YOO
  • Publication number: 20190393353
    Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.
    Type: Application
    Filed: June 24, 2019
    Publication date: December 26, 2019
    Inventors: Jae Kyeong JEONG, Yun Heub SONG, Chang Hwan CHOI, Hyeon Joo SEUL
  • Publication number: 20190088758
    Abstract: Disclosed are a thin film transistor including a substrate and a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode formed on the substrate and a method of fabricating the thin film transistor, wherein the gate insulating film is made of a high dielectric ternary material, A2-XBXO3, wherein A is any one selected from the group consisting of aluminum, silicon, gallium, germanium, neodymium, gadolinium, vanadium, lutetium, and actinium, B is any one selected from the group consisting of yttrium, lanthanum, zirconium, hafnium, tantalum, titanium, vanadium, nickel, silicon, and ytterbium, and A is an element different from B. The gate insulating film may be formed through a solution process, and a high-quality insulating film may be obtained through heat treatment at low temperature.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 21, 2019
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jae Kyeong JEONG, Ji Won LEE
  • Patent number: 9373669
    Abstract: An organic light-emitting display device, which may be configured to prevent moisture or oxygen from penetrating the organic light-emitting display device from the outside is disclosed. An organic light-emitting display device, which is easily applied to a large display device and/or may be easily mass produced is further disclosed. Additionally disclosed is a method of manufacturing an organic light-emitting display device. An organic light-emitting display device may include, for example, a thin-film transistor (TFT) including a gate electrode, an active layer insulated from the gate electrode, source and drain electrodes insulated from the gate electrode and contacting the active layer and an insulating layer disposed between the source and drain electrodes and the active layer; and an organic light-emitting diode electrically connected to the TFT.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: June 21, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun-Joong Chung, Jin-Seong Park, Jong-Han Jeong, Jae-Kyeong Jeong, Yeon-Gon Mo, Min-Kyu Kim, Tae-Kyung Ahn, Hui-Won Yang, Kwang-Suk Kim, Eun-Hyun Kim, Jae-Wook Kang, Jang-Soon Im
  • Patent number: 9240487
    Abstract: A method of manufacturing a thin film transistor having a compound semiconductor with oxygen as a semiconductor layer and a method of manufacturing an organic light emitting display having the thin film transistor include: forming a gate electrode on an insulating substrate; forming a gate insulating layer on the gate electrode; forming a semiconductor layer including oxygen ions on the gate insulating layer, and including a channel region, a source region, and a drain region; forming a source electrode and a drain electrode to contact the semiconductor layer in the source region and the drain region, respectively; and forming a passivation layer on the semiconductor layer by coating an organic material, wherein a carrier density of the semiconductor layer is maintained in the range of 1E+17 to 1E+18/cm3 to have stable electrical property.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: January 19, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hun-Jung Lee, Jae-Kyeong Jeong, Hyun-Soo Shin, Jong-Han Jeong, Jin-Seong Park, Steve Y. G. Mo
  • Publication number: 20150340417
    Abstract: An organic light-emitting display device, which may be configured to prevent moisture or oxygen from penetrating the organic light-emitting display device from the outside is disclosed. An organic light-emitting display device, which is easily applied to a large display device and/or may be easily mass produced is further disclosed. Additionally disclosed is a method of manufacturing an organic light-emitting display device. An organic light-emitting display device may include, for example, a thin-film transistor (TFT) including a gate electrode, an active layer insulated from the gate electrode, source and drain electrodes insulated from the gate electrode and contacting the active layer and an insulating layer disposed between the source and drain electrodes and the active layer; and an organic light-emitting diode electrically connected to the TFT.
    Type: Application
    Filed: July 31, 2015
    Publication date: November 26, 2015
    Inventors: Hyun-Joong CHUNG, Jin-Seong PARK, Jong-Han JEONG, Jae-Kyeong JEONG, Yeon-Gon MO, Min-Kyu KIM, Tae-Kyung AHN, Hui-Won YANG, Kwang-Suk KIM, Eun-Hyun KIM, Jae-Wook KANG, Jang-Soon IM
  • Patent number: 9105862
    Abstract: An organic light-emitting display device, which may be configured to prevent moisture or oxygen from penetrating the organic light-emitting display device from the outside is disclosed. An organic light-emitting display device, which is easily applied to a large display device and/or may be easily mass produced is further disclosed. An organic light-emitting display device may include, for example, a thin-film transistor (TFT) including a gate electrode, an active layer insulated from the gate electrode, source and drain electrodes insulated from the gate electrode and contacting the active layer and an insulating layer disposed between the source and drain electrodes and the active layer; and an organic light-emitting diode electrically connected to the TFT. The insulating layer may include, for example, a first insulating layer contacting the active layer; and a second insulating layer formed of a metal oxide and disposed on the first insulating layer.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: August 11, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun-Joong Chung, Jin-Seong Park, Jong-Han Jeong, Jae-Kyeong Jeong, Yeong-Gon Mo, Min-Kyu Kim, Tae-Kyung Ahn, Hui-Won Yang, Kwang-Suk Kim, Eun-Hyun Kim, Jae-Wook Kang, Jang-Soon Im
  • Patent number: 9035313
    Abstract: A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include a gate electrode formed on a substrate; an active layer made of an oxide semiconductor and insulated from the gate electrode by a gate insulating layer; source and drain electrodes coupled to the active layer; and an interfacial stability layer formed on one or both surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristic as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Kyeong Jeong, Jong-Han Jeong, Min-Kyu Kim, Tae-Kyung Ahn, Yeong-Gon Mo, Hui-Won Yang
  • Patent number: 8871566
    Abstract: A thin film transistor includes a gate electrode, a first insulating layer on the gate electrode, a semiconductor layer on the gate electrode and separated from the gate electrode by the first insulating layer, the semiconductor layer including a channel region corresponding to the gate electrode, a source region, and a drain region, a hydrogen diffusion barrier layer on the semiconductor layer, the hydrogen diffusion barrier layer covering the channel region and exposing the source and drain regions, and a second insulation layer on the source and drain regions and on the hydrogen diffusion barrier layer, such that the hydrogen diffusion barrier layer is between the second insulation layer and the channel region.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: October 28, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun-soo Shin, Yeon-gon Mo, Jae-kyeong Jeong, Jin-seong Park, Hun-jung Lee, Jong-han Jeong
  • Publication number: 20140239291
    Abstract: According to example embodiments a TFT includes: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode; a channel layer on the gate insulating layer, the channel layer including an indium-rich metal-oxide layer; a first electrode on one end of the channel layer; a second electrode on the other end of the channel layer; and a passivation layer on the channel layer between the first and second electrodes.
    Type: Application
    Filed: October 24, 2013
    Publication date: August 28, 2014
    Applicants: INHA-INDUSTRY PARTNERSHIP INSTITUTE, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-seok SON, Myung-kwan RYU, Jae-Kyeong JEONG
  • Patent number: 8796679
    Abstract: A method of manufacturing an IGZO active layer includes depositing ions including In, Ga, and Zn from a first target, and depositing ions including In from a second target having a different atomic composition from the first target. The deposition of ions from the second target may be controlled to adjust an atomic % of In in the IGZO layer to be about 45 atomic % to about 80 atomic %.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: August 5, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-han Jeong, Jae-kyeong Jeong, Jin-seong Park, Yeon-gon Mo, Hui-won Yang, Min-kyu Kim, Tae-kyung Ahn, Hyun-soo Shin, Hun jung Lee