Patents by Inventor Jae Kyu An

Jae Kyu An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9263560
    Abstract: A power semiconductor device may include a first conductivity type first semiconductor region; a second conductivity type second semiconductor region formed on an upper portion of the first semiconductor region; a first conductivity type third semiconductor region formed in an upper inner side of the second semiconductor region; a trench gate formed to penetrate through a portion of the first semiconductor region from the third semiconductor region; and a first conductivity type fourth semiconductor region formed below the second semiconductor region while being spaced apart from the trench gate.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: February 16, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hoon Park, Jae Kyu Sung, In Hyuk Song, Ji Yeon Oh, Dong Soo Seo
  • Publication number: 20160043136
    Abstract: A magnetic memory device is provided. The magnetic memory device includes a substrate including a first source/drain region and a second source/drain region; a word line structure between the first and source/drain regions and extending in a first direction; a buried contact electrically connected to the first source/drain region and on the first source/drain region; a contact pad electrically connected to the buried contact and on the buried contact; and a memory portion electrically connected to the contact pad and on the contact pad, the contact pad including a metal silicide layer.
    Type: Application
    Filed: April 2, 2015
    Publication date: February 11, 2016
    Inventors: Sung-in KIM, Jae-kyu LEE
  • Publication number: 20160027506
    Abstract: Memory systems can include a memory device having an array of nonvolatile memory cells therein, which is electrically coupled to a plurality of bit lines and a plurality of word lines. The nonvolatile memory cells may include respective nonvolatile resistive devices electrically coupled in series with corresponding cell transistors. A controller is also provided, which may be coupled to the memory device. The controller can be configured to drive the memory device with signals that support dual programming of: (i) the nonvolatile resistive devices; and (ii) interface states within the cell transistors, during operations to write data into the memory device.
    Type: Application
    Filed: October 8, 2015
    Publication date: January 28, 2016
    Inventors: Jae-Kyu Lee, Dae-Won Kim
  • Patent number: 9244055
    Abstract: The present invention includes: a main body which defines a storage space in the lengthwise direction, and in which a plurality of biosensors can be stacked; a cover member covering one end of the storage space and including a discharge hole through which only one biosensor located at the outermost edge of the stacked biosensors can pass; and a cover coupled to the cover member in order to be raised and lowered so as to open and close the discharge hole. The discharge hole is closed such that the biosensors stacked in the storage space are not contaminated and the infiltration of impurities into the storage space is prevented, and the discharge hole is temporarily opened when the biosensors are to be used in order to withdraw the biosensors.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: January 26, 2016
    Assignee: Ceragem Medisys Inc.
    Inventors: Jin Woo Lee, Jae Kyu Choi, Young Il Yoon
  • Publication number: 20160014394
    Abstract: Disclosed is an apparatus for assisting driving, including: a stereo camera module mounted in a vehicle, and configured to obtain a first image through a first camera and a second image through a second camera; and a processor configured to stereo-match the first image and the second image to obtain a dense disparity map, estimate a cubic b-spline curved line from the dense disparity map by using a coarse-to-fine method, and perform a road profile for two-dimensionally converting a 3D road, on which the vehicle travels, by using the cubic b-spline curved line.
    Type: Application
    Filed: October 14, 2014
    Publication date: January 14, 2016
    Inventors: Jae Kyu SUHR, Ho Gi JUNG
  • Publication number: 20150347958
    Abstract: Providing supply information in real-time including: providing, in real-time information about a change in a supply state generated before products are stored, and changing supply information including information about available-to-promise products; and adjusting, in real-time, a delivery deadline of delivery promised supply quantities based on the changed supply information in response to the supply information being changed.
    Type: Application
    Filed: December 24, 2014
    Publication date: December 3, 2015
    Applicant: SAMSUNG SDS CO., LTD.
    Inventors: Kang Hyoung CHO, Jae Kyu HAN, Sung Youn KIM
  • Publication number: 20150329972
    Abstract: A phosphate solution for a zinc or zinc-based alloy plated steel sheet, and a zinc or zinc-based alloy plated steel sheet using the same are provided. The phosphate solution for a zinc or zinc-based alloy plated steel sheet contains a molybdenum (Mo) ion, a calcium (Ca) ion and a phosphate ion. A zinc or zinc-based alloy plated steel sheet includes a base steel sheet, a zinc-based or zinc alloy-based plating layer formed on the base steel sheet, and a phosphate film formed on the zinc-based or zinc alloy-based plating layer. The phosphate film contains a molybdenum compound, Ca and a phosphate. A pitting phenomenon occurring at the time of treating a steel sheet with a phosphate is prevented, and excellent corrosion resistance is exhibited on a phosphate film.
    Type: Application
    Filed: December 28, 2012
    Publication date: November 19, 2015
    Applicant: POSCO
    Inventors: Young-Jin KWAK, Kyung-Hoon NAM, Yong-Hwa JUNG, Tae-Yeob KIM, Dong-Yoeul LEE, Seok-Won CHO, Young-Ra LEE, Mun-Jong EOM, Woo-Sung JUNG, Seok-Jun HONG, Jae-Kyu MIN, Hong-Kyun SOHN
  • Patent number: 9183931
    Abstract: Memory systems can include a memory device having an array of nonvolatile memory cells therein, which is electrically coupled to a plurality of bit lines and a plurality of word lines. The nonvolatile memory cells may include respective nonvolatile resistive devices electrically coupled in series with corresponding cell transistors. A controller is also provided, which may be coupled to the memory device. The controller can be configured to drive the memory device with signals that support dual programming of: (i) the nonvolatile resistive devices; and (ii) interface states within the cell transistors, during operations to write data into the memory device.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: November 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Kyu Lee, Dae-Won Kim
  • Publication number: 20150317233
    Abstract: An apparatus and a method for maximizing debugging performance and reducing memory overhead are provided. The method includes generating a debug protocol packet and transmitting the generated debug protocol packet to a diagnostic device. The debug protocol packet includes reference information for at least one string associated with a debug trace.
    Type: Application
    Filed: April 29, 2015
    Publication date: November 5, 2015
    Inventors: Vrind TUSHAR, Raju Udava SIDDAPPA, Venkata Raju INDUKURI, Dae-Sop PARK, Jae-Kyu LEE, Sang-Il CHOI, Seok-Min HWANG
  • Publication number: 20150297754
    Abstract: The present invention provides non-human animal models of neuronal injury and/or cognitive dysfunction and methods of making and using such animal models. The animal models of the invention are particularly suited to assessing neurodegeneration in selected regions of interest in the CNS, and thus especially useful for testing the therapeutic efficacy of agents targeting neurodegeneration associated with aging, neurodegenerative diseases, autoimmunity and trauma (e.g., ischemia).
    Type: Application
    Filed: November 20, 2013
    Publication date: October 22, 2015
    Inventors: Katerina Akassoglou, Jae Kyu Ryu
  • Publication number: 20150303775
    Abstract: A direct current (DC) motor including: a cylindrical frame, at least one end of which is open; a cylindrical end cover including an opening configured to block the at least one open end; a rotor including a rotor shaft supported by the frame and the end cover, and a rotor core installed on the rotor shaft; a commutator installed on the rotor shaft and arranged on one end of the rotor core; a cover unit installed on the rotor shaft, arranged between the rotor and the commutator, and including at least one location detection device; and a rotation detection unit installed in the end cover and configured to detect the at least one location detection device.
    Type: Application
    Filed: April 21, 2015
    Publication date: October 22, 2015
    Inventors: Jae-kyu Shim, Woo-jong Cho, Bon-min Koo, Kun-woo Lee
  • Patent number: 9165646
    Abstract: A resistive memory device includes a memory cell array, an input/output (I/O) sense amplifier unit, an address input buffer, a row decoder, and a column decoder. The memory cell array includes unit memory cells, and operates in response to a word line driving signal and a column selecting signal, each unit memory cell includes a resistive device and a compensation resistive device. The I/O sense amplifier unit amplifies data output from the memory cell array to generate first data, and transfers input data to the memory cell array. The address input buffer generates a row address signal and a column address signal based on an external address. The row decoder decodes the row address signal and generates the word line driving signal based on the decoded row address signal. The column decoder decodes the column address signal and generates the column selecting signal based on the decoded column address signal.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: October 20, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-Kyu Lee
  • Patent number: 9117122
    Abstract: An apparatus and a method for tracing a parking-lot is provided that includes a controller configured to recognize at least one parking-lot from a previous image frame which photographed a surrounding of a vehicle and extract a template according to a type of a parking-lot line of the recognized parking-lot. In addition, the controller is configured to generate a template transformed based on a position information of the parking-lot and calculate similarity by comparing a template generated from a previous image frame with a parking-lot line recognized from a current image frame. A position of a parking-lot is determined according to the calculated similarity and the controller is configured to correct the template based on an information of a parking-lot line extracted from the determined position.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: August 25, 2015
    Assignees: Hyundai Motor Company, Kia Motors Corporation, Industry-University Cooperation Foundation Hanyang University
    Inventors: Jae Seob Choi, Seong Sook Ryu, Dae Joong Yoon, Eu Gene Chang, Ho Gi Jung, Jae Kyu Suhr
  • Publication number: 20150221699
    Abstract: The magnetic memory device includes a plurality of source lines arranged in parallel in a second direction orthogonal to a first direction while extending in the first direction on a substrate, a plurality of word lines arranged in parallel in the first direction while extending in the second direction on the substrate, a plurality of bit lines arranged in parallel in the second direction while extending in the first direction on the substrate to alternate with the plurality of source lines, and a plurality of active regions arranged to extend at an oblique angle with respect to the first direction and arranged so that one memory cell is selected when one of the plurality of word lines and one of the plurality of source lines or the plurality of bit lines are selected.
    Type: Application
    Filed: January 16, 2015
    Publication date: August 6, 2015
    Inventors: Jae-kyu LEE, Ki-Seok SUH
  • Publication number: 20150221527
    Abstract: Compositions that have relatively high Tg, relatively low CTE, and relatively low modulus are suitable for use as encapsulants with stress-sensitive electronic assemblies, such as those containing low k dielectrics. These compositions are used in methods of die attachment, encapsulation, and solder bump reinforcement.
    Type: Application
    Filed: January 26, 2015
    Publication date: August 6, 2015
    Inventors: Paul L. MORGANELLI, Jae-Kyu CHO, Jenna M. CORDERO
  • Publication number: 20150209390
    Abstract: The present disclosure provides adipose cell extracts and its use. The composition comprising the present extracts and method can be used advantageously for a stem cell-based, noninvasive therapy for treating neurologic disease such as stroke and HD. Also, in contrast to the stem cell transplantation, the present method or composition enables the repeated treatments, due to the convenient administration, thus leading to a more efficient prevention and/or curing of the disease of interest.
    Type: Application
    Filed: January 23, 2015
    Publication date: July 30, 2015
    Applicant: SNU R&DB FOUNDATION
    Inventors: Kon CHU, Jae-Kyu ROH, Manho KIM, Sang Kun LEE, Keun-Hwa JUNG, Soon-Tae LEE, Daejong JEON, Wooseok IM, Jae-Jun BAN
  • Publication number: 20150194200
    Abstract: A resistive memory device includes a cell block having a plurality of unit memory cells in which a resistive element and a cell select element are connected to each other in series, the cell block operating in response to a word line, a bit line, and a source line, and a dummy line, when different interconnection layers form the source line and the bit line, respectively, connected to one of the interconnection layers which is formed at a lower side the remaining interconnection layer between the interconnection layers for the source line and the bit line, wherein the dummy line has a resistance lower than a resistance of the lower interconnection layer.
    Type: Application
    Filed: October 9, 2014
    Publication date: July 9, 2015
    Inventors: Ki-Seok SUH, Jae-kyu LEE
  • Publication number: 20150187869
    Abstract: A power semiconductor device may include: a first conductivity-type first semiconductor region; a resurf region disposed in the first semiconductor region and including first conductivity-type second semiconductor regions and second conductivity-type third semiconductor regions alternately disposed in a width direction; a first conductivity-type first cover region disposed in the first semiconductor region, disposed to be contiguous with an upper surface of the resurf region, and having an impurity concentration higher than that of the first semiconductor region; a second conductivity-type fourth semiconductor region disposed above the first semiconductor region; a first conductivity-type fifth semiconductor region disposed on an inner side of an upper portion of the fourth semiconductor region; and a trench gate disposed to penetrate from the fifth semiconductor region to a portion of an upper portion of the first semiconductor region and including a gate insulating layer and a conductive material.
    Type: Application
    Filed: May 7, 2014
    Publication date: July 2, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hoon PARK, Kyu Hyun Mo, Jae Kyu Sung, Kee Ju Um, In Hyuk Song
  • Publication number: 20150187877
    Abstract: A power semiconductor device may include: an active region having a channel formed therein when the power semiconductor device is turned on, the channel allowing a current to flow therethrough; a termination region formed around the active region; first trenches formed in the active region, each first trench having an insulating layer formed on a surface thereof and filled with a conductive material; and second trenches formed in the termination region, each second trench having an insulating layer formed on a surface thereof and filled with a conductive material.
    Type: Application
    Filed: May 8, 2014
    Publication date: July 2, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hoon PARK, Jae Kyu SUNG, In Hyuk SONG, Kee Ju UM, Dong Soo SEO
  • Publication number: 20150179825
    Abstract: A diode device may include a first conductivity type first semiconductor region, a second conductivity type second semiconductor region partially formed inside an upper portion of the first semiconductor region, and second conductivity type third semiconductor regions partially formed inside the upper portion of the first semiconductor region, formed on sides of the second semiconductor region, and having an impurity concentration higher than that of the second semiconductor region.
    Type: Application
    Filed: July 16, 2014
    Publication date: June 25, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Kyu SUNG, Chang Su Jang, In-Hyuk Song, Kyu Hyun Mo, Sun Jae Yoon