Patents by Inventor Jae Kyu Cho

Jae Kyu Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170108346
    Abstract: A method for providing a geo-fence service using a map provided via a navigation device includes: searching for at least one critical route from a current position of a vehicle or an origin to a destination mapped onto the map; displaying a first critical route onto the map along the vehicle can travel to the destination, the first critical route corresponding to a shortest route among the at least one searched critical route; and determining whether the vehicle deviates from a geo-fence area including the at least one searched critical route.
    Type: Application
    Filed: December 10, 2015
    Publication date: April 20, 2017
    Inventors: Jae Kyu Cho, Nam Joon Kim
  • Patent number: 9472509
    Abstract: Methods for forming a dummy metal structure between dies on a semiconductor wafer and the resulting devices are disclosed. Embodiments may include forming metal interconnection layers extending from a substrate of a semiconductor wafer to a top metal interconnection layer of the semiconductor wafer between a plurality of die regions, each of the metal interconnection layers including a plurality of dummy vertical interconnect accesses (VIAs) and a plurality of dummy metal lines, with the plurality of dummy metal lines laterally connecting the plurality of dummy VIAs within each respective metal interconnection layer, and a plurality of dummy VIAs within a first metal interconnection layer vertically connecting a plurality of dummy metal lines within the first metal interconnection layer to a plurality of dummy metal lines within a second metal interconnection layer, and the second metal interconnection layer being below the first metal interconnection layer.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: October 18, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Jae Kyu Cho, Shan Gao
  • Publication number: 20160254234
    Abstract: Methods for forming a dummy metal structure between dies on a semiconductor wafer and the resulting devices are disclosed. Embodiments may include forming metal interconnection layers extending from a substrate of a semiconductor wafer to a top metal interconnection layer of the semiconductor wafer between a plurality of die regions, each of the metal interconnection layers including a plurality of dummy vertical interconnect accesses (VIAs) and a plurality of dummy metal lines, with the plurality of dummy metal lines laterally connecting the plurality of dummy VIAs within each respective metal interconnection layer, and a plurality of dummy VIAs within a first metal interconnection layer vertically connecting a plurality of dummy metal lines within the first metal interconnection layer to a plurality of dummy metal lines within a second metal interconnection layer, and the second metal interconnection layer being below the first metal interconnection layer.
    Type: Application
    Filed: May 12, 2016
    Publication date: September 1, 2016
    Inventors: Jae Kyu CHO, Shan GAO
  • Patent number: 9406608
    Abstract: Methods for forming a dummy metal structure between dies on a semiconductor wafer and the resulting devices are disclosed. Embodiments may include forming metal interconnection layers extending from a substrate of a semiconductor wafer to a top metal interconnection layer of the semiconductor wafer between a plurality of die regions, each of the metal interconnection layers including a plurality of dummy vertical interconnect accesses (VIAs) and a plurality of dummy metal lines, with the plurality of dummy metal lines laterally connecting the plurality of dummy VIAs within each respective metal interconnection layer, and a plurality of dummy VIAs within a first metal interconnection layer vertically connecting a plurality of dummy metal lines within the first metal interconnection layer to a plurality of dummy metal lines within a second metal interconnection layer, and the second metal interconnection layer being below the first metal interconnection layer.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: August 2, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Jae Kyu Cho, Shan Gao
  • Publication number: 20160111360
    Abstract: Methods for forming a dummy metal structure between dies on a semiconductor wafer and the resulting devices are disclosed. Embodiments may include forming metal interconnection layers extending from a substrate of a semiconductor wafer to a top metal interconnection layer of the semiconductor wafer between a plurality of die regions, each of the metal interconnection layers including a plurality of dummy vertical interconnect accesses (VIAs) and a plurality of dummy metal lines, with the plurality of dummy metal lines laterally connecting the plurality of dummy VIAs within each respective metal interconnection layer, and a plurality of dummy VIAs within a first metal interconnection layer vertically connecting a plurality of dummy metal lines within the first metal interconnection layer to a plurality of dummy metal lines within a second metal interconnection layer, and the second metal interconnection layer being below the first metal interconnection layer.
    Type: Application
    Filed: October 16, 2014
    Publication date: April 21, 2016
    Inventors: Jae Kyu CHO, Shan GAO
  • Publication number: 20150221527
    Abstract: Compositions that have relatively high Tg, relatively low CTE, and relatively low modulus are suitable for use as encapsulants with stress-sensitive electronic assemblies, such as those containing low k dielectrics. These compositions are used in methods of die attachment, encapsulation, and solder bump reinforcement.
    Type: Application
    Filed: January 26, 2015
    Publication date: August 6, 2015
    Inventors: Paul L. MORGANELLI, Jae-Kyu CHO, Jenna M. CORDERO
  • Publication number: 20100146577
    Abstract: The present invention relates to a digital multimedia broadcasting reception system and method, and in particular to, a technology for transmitting a digital multimedia broadcasting signal received in a tuner to a head unit without a compression process.
    Type: Application
    Filed: August 4, 2009
    Publication date: June 10, 2010
    Applicant: HYUNDAI MOTOR COMPANY
    Inventor: Jae Kyu Cho