Abstract: A stator for a drive motor includes: a segmented stator core including a plurality of mounting portions; a bobbin equipped on each mounting portion of the plurality of the mounting portions and having a coil wound thereon; a first casing and a second casing coupled to the bobbin, respectively, at opposite sides of the bobbin with respect to the segmented stator core, and configured to enclose the coil; a passage formed in one of the first casing or the second casing, and configured to allow fluid communication with the inside of the first casing and the second casing; and a terminal portion integrally formed in a remaining one of the first casing or the second casing and configured to allow connection of the coil.

Abstract: A stator for a drive motor includes: a segmented stator core including a plurality of mounting portions; a bobbin equipped on each mounting portion of the plurality of the mounting portions and having a coil wound thereon; a first casing and a second casing coupled to the bobbin, respectively, at opposite sides of the bobbin with respect to the segmented stator core, and configured to enclose the coil; a passage formed in one of the first casing or the second casing, and configured to allow fluid communication with the inside of the first casing and the second casing; and a terminal portion integrally formed in a remaining one of the first casing or the second casing and configured to allow connection of the coil.

Abstract: A stator support member of a rotating electrical machine is provided with a cooling channel formed in the stator support member to cool a stator. The stator support member is manufactured to have the cooling channel of a hermetically sealed structure so that a cooling fluid may flow along the cooling channel. In particular, the support member having the cooling channel is divided into a ring-shaped outer part and a ring-shaped inner part (two-piece type) and the separately manufactured ring-shaped outer part and inner part are combined together.

Abstract: A direct-cooling stator core assembly having cooling channels so as to directly cool a stator core and a wound coil, and a driving motor for a vehicle including the same, are provided. The direct-cooling stator core assembly includes a stator core having an outer surface and a plurality of core recesses formed in the outer surface in a longitudinal direction. The direct-cooling stator core assembly further includes a cooling fluid supply member configured to supply cooling fluid to the core recesses in the stator core. In the direct-cooling stator core assembly, when cooling fluid is flowing through the core recesses, the cooling fluid flowing through the core recesses directly cools the stator core.

Abstract: A resolver is installed inside a housing of a motor. A stator of the resolver has a three layered core. a main layer of an electric steel sheet, a first shielding layer of a magnetic metal, a second shielding layer interposed between the domain layer and the first to shielding layer. The second shielding layer is made of a non-magnetic material.

Abstract: A coil wiring unit of a drive motor for a vehicle is provided. The unit includes a bus bar assembly that has a plurality of bus bars for connecting coils of the drive motor to each phases stacked in a longitudinal direction. A plurality of insulating sheets are disposed between each of the bus bars and correspond to the shape of each of the bus bars.

Abstract: A resolver is installed inside a housing of a motor. A stator of the resolver has a three layered core. a main layer of an electric steel sheet, a first shielding layer of a magnetic metal, a second shielding layer interposed between the domain layer and the first to shielding layer. The second shielding layer is made of a non-magnetic material.

Abstract: A direct-cooling stator core assembly having cooling channels so as to directly cool a stator core and a wound coil, and a driving motor for a vehicle including the same, are provided. The direct-cooling stator core assembly includes a stator core having an outer surface and a plurality of core recesses formed in the outer surface in a longitudinal direction. The direct-cooling stator core assembly further includes a cooling fluid supply member configured to supply cooling fluid to the core recesses in the stator core. In the direct-cooling stator core assembly, when cooling fluid is flowing through the core recesses, the cooling fluid flowing through the core recesses directly cools the stator core.

Abstract: A stator support member of a rotating electrical machine is provided with a cooling channel formed in the stator support member to cool a stator. The stator support member is manufactured to have the cooling channel of a hermetically sealed structure so that a cooling fluid may flow along the cooling channel. In particular, the support member having the cooling channel is divided into a ring-shaped outer part and a ring-shaped inner part (two-piece type) and the separately manufactured ring-shaped outer part and inner part are combined together.

Abstract: In a method of manufacturing a semiconductor device, a tunnel insulation layer is formed on a substrate. A charge trapping layer is formed on the tunnel insulation layer. A protection layer pattern or a mold is formed on the charge trapping layer. Charge trapping layer patterns are formed on the tunnel insulation layer by etching the charge trapping layer using the protection layer pattern or the mold. The charge trapping layer patterns may be spaced apart from each other. Blocking layers are formed on the charge trapping layer patterns, respectively. A gate electrode is formed on the blocking layers and the tunnel insulation layer using the protection layer pattern or the mold.

Abstract: In a method of manufacturing a semiconductor device, a tunnel insulation layer is formed on a substrate. A charge trapping layer is formed on the tunnel insulation layer. A protection layer pattern or a mold is formed on the charge trapping layer. Charge trapping layer patterns are formed on the tunnel insulation layer by etching the charge trapping layer using the protection layer pattern or the mold. The charge trapping layer patterns may be spaced apart from each other. Blocking layers are formed on the charge trapping layer patterns, respectively. A gate electrode is formed on the blocking layers and the tunnel insulation layer using the protection layer pattern or the mold.

Abstract: A nonvolatile memory device includes a semiconductor substrate; a source region that is formed in the semiconductor substrate; a gate insulating film that is formed so as to partially overlap the source region on the semiconductor substrate; a floating gate that is formed on the gate insulating film so as to have a structure forming a uniform electric field in the portion that overlaps the source region; a control gate that is formed so as to be electrically isolated along one sidewall of the floating gate from an upper part of the floating gate, an inter-gate insulating film that is interposed between the floating gate and the control gate, and a drain region that is formed so as to be adjacent the other side of the control gate.

Abstract: A semiconductor device includes a substrate divided into a memory cell region and a logic region. A split gate electrode structure is formed in a memory cell region of a substrate. A silicon oxide layer is formed on a sidewall of the split gate electrode structure and a surface of the substrate. A word line is formed on the silicon oxide layer that is positioned on the sidewall of the split gate electrode structure. The word line has an upper width and a lower width. The lower width is greater than the upper width. A logic gate pattern is formed on a logic region of the substrate. The logic gate pattern has a thickness thinner than the lower width of the word line.

Abstract: A method of fabricating a compound device includes forming a first gate insulating pattern on a semiconductor substrate including a first region and a second region, forming a second gate insulating layer on the first gate insulating pattern, and after forming the second gate insulating layer, forming a well in the second region of the semiconductor substrate.

Abstract: Provided are a nonvolatile memory device and a method for manufacturing the same. The nonvolatile memory device may include a semiconductor substrate, a floating gate, a second insulation layer, a third insulation layer, a control gate, and a common source line. The semiconductor substrate may have an active region limited by a device isolation region. The floating gate may be formed on the active region with a first insulation layer between the floating gate and the active region. The second insulation layer covers one side of the floating gate, and the third insulation layer covers the floating gate and the second insulation layer. The control gate may be formed on the other side of the floating gate with a fourth insulation layer between the control gate and the floating gate. The common source line may be formed in a portion of the substrate that is located under the second insulation layer.

Abstract: Example embodiments may provide a nonvolatile memory device. The example embodiment nonvolatile memory device may include a floating gate structure formed on a semiconductor substrate with a gate insulating layer between them and/or a control gate formed adjacent to the floating gate with a tunneling insulation layer between them. The floating gate may include a first floating gate formed on the gate insulating layer, a second floating gate formed on the first floating gate with a first insulating pattern between them, and/or a gate connecting layer formed on at least one sidewall of the first insulating pattern so that the gate conducting layer may electrically connect the first floating gate and the second floating gate. The second floating gate may have a tip formed at its longitudinal end that may not contact the gate connecting layer.

Abstract: A nonvolatile memory device includes a semiconductor substrate; a source region that is formed in the semiconductor substrate; a gate insulating film that is formed so as to partially overlap the source region on hte semiconductor substrate; a floating gate that is formed on the gate insulating film so as to have a structure forming a uniform electric field in the portion that overlaps the source region; a control gate that is formed so as to be elecrically isolated along one sidewall of the floating gate from an upper part of the floating gate, an inter-gate insulating film that is interposed between the floating gate and the control gate, and a drain region that is formed so as to be adjacent the other side of the control gate.

Abstract: A method of fabricating a flash memory cell having a split gate structure. A sacrificial layer is formed on a floating gate layer formed on a semiconductor substrate. The sacrificial layer is etched to form an opening exposing a portion of the floating gate layer. A gate interlayer insulating layer pattern is formed inside the opening. After removing the sacrificial layer pattern and etching the floating gate layer (using the gate interlayer insulating layer pattern as an etch mask), a floating gate is formed under the gate interlayer insulating layer pattern. A control gate is formed overlapping a portion of the floating gate.

Abstract: A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.

Abstract: In a method of manufacturing a non-volatile memory device, a first gate insulation layer and a conductive layer are formed on a substrate and then the conductive layer is partially oxidized to form an oxide layer pattern. The conductive layer is partially etched using the oxide layer pattern as an etching mask to form a floating gate electrode on the first gate insulation layer and then the silicon layer is formed on the substrate including the floating gate electrode. The silicon layer is oxidized to form a tunnel insulation layer and a second gate insulation layer on a sidewall of the floating gate electrode and on a surface portion of the substrate adjacent to the floating gate electrode and then a control gate electrode is formed on the tunnel insulation layer and the second gate insulation layer.