Patents by Inventor Jae-Seok Jeong

Jae-Seok Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020130621
    Abstract: A plasma display panel including a substrate having via holes, partitions spaced a predetermined distance apart on the substrate, address electrodes having a predetermined pattern on portions of the substrate between adjacent pairs of the partitions, each address electrode being split into at least three parts with each split part corresponding to two pixels, a first dielectric layer on the substrate to cover the address electrodes and where the via holes correspond to the address electrodes, a conductive layer in the via holes and electrically connected with the address electrodes, terminals connected to the conductive layer on the rear surface of the substrate, a transparent front plate disposed opposite the substrate, sustaining electrodes on the front plate at a predetermined angle with respect to a direction of the address electrodes, the sustaining electrodes comprising pairs of first and second electrodes, and a second dielectric layer on the front plate to cover the sustaining electrodes.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 19, 2002
    Inventors: Jae-Seok Jeong, Dae-Young Hong
  • Patent number: 6411043
    Abstract: An AC type plasma display panel including a front substrate, strip-shaped common and scan electrodes on a bottom surface of the front substrate, bus electrodes along one edge of a side of respective the common and scan electrodes, a first dielectric layer on the bottom surface of the front substrate to cover the electrodes, a protective layer on a bottom surface of the first dielectric layer, a rear substrate opposite to and facing the front substrate, address electrodes on a top surface of the rear substrate to be perpendicular with the common and scan electrodes, a second dielectric layer on the rear substrate to cover the address electrodes, partitions comprising strip-shaped main partitions formed on the second dielectric layer, and auxiliary partitions connected to the main partitions to partition a discharge space, and R, G and B phosphor layers formed on the inner walls of the partitions.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: June 25, 2002
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Jae-seok Jeong, Tae-kyoung Kang, Young-hwa Song
  • Publication number: 20020057230
    Abstract: A method of driving a plasma display panel having a structure in which discharge cells are between a Y electrode line and adjacent X electrode lines thereabove and therebelow. The method includes dividing the X electrode lines into odd and even X groups, the Y electrode lines into Y groups such that pairs of X and Y groups include pairs of adjacent X and Y electrode lines, and the X and Y electrode lines are commonly connected to one another in units of the odd X groups, the even X groups, and the Y groups, driving the Y groups, the X groups, and the address electrode lines in an odd field to drive the odd discharge cells in a vertical direction, driving the Y groups, the X groups, and the address electrode lines in an even field to drive the even discharge cells in a vertical direction.
    Type: Application
    Filed: October 26, 2001
    Publication date: May 16, 2002
    Applicant: SAMSUNG SDI CO., LTD.
    Inventor: Jae-seok Jeong
  • Publication number: 20020047585
    Abstract: An AC type plasma display panel including a front substrate, strip-shaped common and scan electrodes on a bottom surface of the front substrate, bus electrodes along one edge of a side of respective the common and scan electrodes, a first dielectric layer on the bottom surface of the front substrate to cover the electrodes, a protective layer on a bottom surface of the first dielectric layer, a rear substrate opposite to and facing the front substrate, address electrodes on a top surface of the rear substrate to be perpendicular with the common and scan electrodes, a second dielectric layer on the rear substrate to cover the address electrodes, partitions comprising strip-shaped main partitions formed on the second dielectric layer, and auxiliary partitions connected to the main partitions to partition a discharge space, and R, G and B phosphor layers formed on the inner walls of the partitions.
    Type: Application
    Filed: April 25, 2001
    Publication date: April 25, 2002
    Inventors: Jae-seok Jeong, Tae-kyoung Kang, Young-hwa Song