Patents by Inventor Jae-Seok Yang
Jae-Seok Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240352627Abstract: Disclosed are a composition for an organic optoelectronic device including at least one kind of a first host compound represented by the Chemical Formula 1 and at least one kind of a second host compound represented by the Chemical Formula 2, and an organic optoelectronic device and a display device including the composition.Type: ApplicationFiled: July 1, 2024Publication date: October 24, 2024Inventors: Jae-Jin OH, Gi-Wook Kang, Eui-Su Kang, Youn-Hwan Kim, Hun Kim, Yong-Tak Yang, Eun-Sun Yu, Nam-Heon Lee, Han-Ill Lee, Pyeong-Seok Cho
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Publication number: 20240328561Abstract: A pipe inspection apparatus is provided according to one embodiment of the present invention. The pipe inspection apparatus may include a moving body part to travel in a pipe, at least one drive cup disposed on an outer surface of the moving body part and configured to allow the moving body part to travel along an inside of the pipe due to a pressure of a fluid flowing in the pipe, at least one front guide part disposed on a front portion of the drive cup and including a front wheel that brings into contact with the pipe, and at least one rear guide part disposed on a rear portion of the drive cup and including a rear wheel that brings into contact with the pipe.Type: ApplicationFiled: January 21, 2024Publication date: October 3, 2024Inventors: Hong Seok SONG, Hui Ryoung YOO, Dong Kyu KIM, Dae Kwang KIM, Jae Jun KIM, Seung Ung YANG, Kwang Hyun YOO, Byung Taek OH
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Publication number: 20240322449Abstract: The present invention relate to an antenna apparatus, and more particularly, to an antenna apparatus including an antenna housing part formed in a form of an enclosure opened at a front side thereof, a board assembly disposed to be tightly attached to an internal space defined by the antenna housing part, and a plurality of antenna RF modules arranged on a front surface of the board assembly, in which the antenna housing part is divided into at least three components, and the components are manufactured and then coupled to one another to prevent distortion caused by thermal stress between upper and lower ends due to a difference in heat generation amount between heating elements mounted on the board assembly, thereby preventing the antenna housing part from being distorted by thermal stress caused by imbalance of heat generated from the heating elements, and solving a PIMD problem by preventing an unintended movement and clearance of the internal antenna RF modules.Type: ApplicationFiled: May 31, 2024Publication date: September 26, 2024Applicant: KMW INC.Inventors: Duk Yong KIM, Sung Hwan SO, Jae Hong KIM, Bo Sung KIM, Sung Ho JANG, Yun Ho LEE, Ji Hun LEE, Young Hun KWON, Yong Won SEO, Jin Sik PARK, Hyoung Seok YANG, Bae Mook JEONG, Kyo Sung JI, Chi Back RYU
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Publication number: 20240313431Abstract: The present invention relates to an RF module for an antenna, and an antenna apparatus comprising same. In particular, the RF module comprises: a unit RF filter body arranged on the front surface of a main board; a radiating element unit disposed on the front surface of the unit RF filter body; and a reflector panel which is formed to be wider than the area of the vertical cross-section of the unit RF filter body while forming the front surface of the unit RF filter body, and grounds (GND) the radiating element unit, wherein a plurality of cavities opened outward to the left and right are respectively formed on the left and right sides of the unit RF filter body, each cavity comprises a left filter unit and a right filter unit which have a built-in resonator so as to perform different frequency filtering, and the left filter unit and the right filter unit are electrically connected to the radiating element unit by passing through the reflector panel.Type: ApplicationFiled: May 24, 2024Publication date: September 19, 2024Applicant: KMW INC.Inventors: Duk Yong KIM, Sung Hwan SO, Jae Hong KIM, Bo Sung KIM, Sung Ho JANG, Yun Ho LEE, Ji Hun LEE, Young Hun KWON, Yong Won SEO, Jin Sik PARK, Hyoung Seok YANG, Bae Mook JEONG, Kyo Sung JI, Chi Back RYU
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Publication number: 20240298411Abstract: A method of manufacturing a printed circuit board includes: forming a resist layer; exposing first areas of the resist layer spaced apart from each other; after exposing the first areas, exposing second areas of the resist layer, the second areas being spaces between the first areas; forming first and second openings spaced apart from each other in the first and second areas by developing the resist layer; and forming a plurality of conductor patterns by filling the first and second openings with conductors.Type: ApplicationFiled: May 13, 2024Publication date: September 5, 2024Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chan Jin Park, Jong Eun Park, Hyun Seok Yang, Sangik Cho, Hiroki Okada, Young Ook Cho, Mi Jeong Jeon, In Jae Chung
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Patent number: 12068326Abstract: A semiconductor device includes a substrate having cell areas and power areas that are alternately arranged in a second direction. Gate structures extend in the second direction. The gate structures are spaced apart from each other in a first direction perpendicular to the second direction. Junction layers are arranged at both sides of each gate structure. The junction layers are arranged in the second direction such that each of the junction layer has a flat portion that is proximate to the power area. Cutting patterns are arranged in the power areas. The cutting patterns extend in the first direction such that each of the gate structures and each of the junction layers in neighboring cell areas are separated from each other by the cutting pattern.Type: GrantFiled: February 28, 2023Date of Patent: August 20, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-Hun Kim, Jae-Seok Yang, Hae-Wang Lee
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Patent number: 11973109Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.Type: GrantFiled: November 15, 2021Date of Patent: April 30, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-Hun Kim, Jae Seok Yang, Hae Wang Lee
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Patent number: 11935835Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the device including gate structures on a substrate; source/drain layers on portions of the substrate that are adjacent the gate structures, respectively; first contact plugs contacting upper surfaces of the source/drain layers, respectively; a second contact plug contacting one of the gate structures, a sidewall of the second contact plug being covered by an insulating spacer; and a third contact plug commonly contacting an upper surface of at least one of the gate structures and at least one of the first contact plugs, at least a portion of a sidewall of the third contact plug not being covered by an insulating spacer.Type: GrantFiled: December 14, 2020Date of Patent: March 19, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Hyo-Jin Kim, Chang-Hwa Kim, Hwi-Chan Jun, Chul-Hong Park, Jae-Seok Yang, Kwan-Young Chun
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Publication number: 20240063259Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.Type: ApplicationFiled: November 1, 2023Publication date: February 22, 2024Inventors: Young-Hun KIM, Jae Seok YANG, Hae Wang LEE
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Patent number: 11868691Abstract: An integrated circuit including a standard cell includes: a plurality of first wells extending in a first horizontal direction with a first width and of a first conductivity type; and a plurality of second wells extending in the first horizontal direction with a second width and having a second conductivity type, wherein the plurality of first wells and the plurality of second wells are alternately arranged in a second horizontal direction that is orthogonal to the first horizontal direction, and when m and n are integers greater than or equal to 3, the standard cell has a length in the second horizontal direction, the length being equal to a sum of m times a half of the first width and n times a half of the second width.Type: GrantFiled: September 14, 2022Date of Patent: January 9, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Raheel Azmat, Sidharth Rastogi, Chul-hong Park, Jae-seok Yang, Kwan-young Chun
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Publication number: 20230361037Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including a first side and a second side that are opposite to each other, a power tap cell in a first row, a second row adjacent to the first row, and a third row adjacent to the second row, on the first side of the substrate, a first power rail and a second power rail on the power tap cell, that extend in a first direction and are spaced apart from each other in a second direction, and a power delivery network on the second side of the substrate. The power tap cell includes a first power through via that penetrates the substrate and extends from the power delivery network to the first power rail, and a second power through via that penetrates the substrate and extends from the power delivery network to the second power rail.Type: ApplicationFiled: April 21, 2023Publication date: November 9, 2023Inventors: Byung Ju Kang, Pan Jae Park, Ji Wook Kwon, Chul Hong Park, Jae Seok Yang
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Publication number: 20230215868Abstract: A semiconductor device includes a substrate having cell areas and power areas that are alternately arranged in a second direction. Gate structures extend in the second direction. The gate structures are spaced apart from each other in a first direction perpendicular to the second direction. Junction layers are arranged at both sides of each gate structure. The junction layers are arranged in the second direction such that each of the junction layer has a flat portion that is proximate to the power area. Cutting patterns are arranged in the power areas. The cutting patterns extend in the first direction such that each of the gate structures and each of the junction layers in neighboring cell areas are separated from each other by the cutting pattern.Type: ApplicationFiled: February 28, 2023Publication date: July 6, 2023Inventors: YOUNG-HUN KIM, JAE-SEOK YANG, HAE-WANG LEE
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Patent number: 11600639Abstract: A semiconductor device includes a substrate having cell areas and power areas that are alternately arranged in a second direction. Gate structures extend in the second direction. The gate structures are spaced apart from each other in a first direction perpendicular to the second direction. Junction layers are arranged at both sides of each gate structure. The junction layers are arranged in the second direction such that each of the junction layer has a flat portion that is proximate to the power area. Cutting patterns are arranged in the power areas. The cutting patterns extend in the first direction such that each of the gate structures and each of the junction layers in neighboring cell areas are separated from each other by the cutting pattern.Type: GrantFiled: November 2, 2020Date of Patent: March 7, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-Hun Kim, Jae-Seok Yang, Hae-Wang Lee
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Publication number: 20230041615Abstract: Provided are a system for recommending related data based on similarity, and a method thereof, the system including: a data collection device; an event extraction device; a data cleansing device; an event vector generation device; an artificial intelligence learning device; and a similar data recommendation device. The present disclosure is directed to providing a system for recommending related data based on similarity and a method thereof, wherein unstructured open data on a webpage is collected to automatically generate an event label for determining a similarity relation, and an artificial intelligence (AI)-based model is trained to group and recommend semantically similar related data, thereby effectively helping users including data scientists who want to see meaningful results through open data.Type: ApplicationFiled: July 27, 2022Publication date: February 9, 2023Applicant: WISENUT, INC.Inventors: Jae Seok YANG, Byung Su LIM, Ha Young KIM, Ki Woong NAM
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Publication number: 20230015367Abstract: An integrated circuit including a standard cell includes: a plurality of first wells extending in a first horizontal direction with a first width and of a first conductivity type; and a plurality of second wells extending in the first horizontal direction with a second width and having a second conductivity type, wherein the plurality of first wells and the plurality of second wells are alternately arranged in a second horizontal direction that is orthogonal to the first horizontal direction, and when m and n are integers greater than or equal to 3, the standard cell has a length in the second horizontal direction, the length being equal to a sum of m times a half of the first width and n times a half of the second width.Type: ApplicationFiled: September 14, 2022Publication date: January 19, 2023Inventors: Raheel Azmat, Sidharth Rastogi, Chul-hong Park, Jae-seok Yang, Kwan-young Chun
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Publication number: 20220336344Abstract: A semiconductor device includes an insulator on a substrate and having opposite first and second sides that each extend along a first direction, a first fin pattern extending from a third side of the insulator along the first direction, a second fin pattern extending from a fourth side of the insulator along the first direction, and a first gate structure extending from the first side of the insulator along a second direction transverse to the first direction. The device further includes a second gate structure extending from the second side of the insulator along the second direction, a third fin pattern overlapped by the first gate structure, spaced apart from the first side of the insulator, and extending along the first direction, and a fourth fin pattern which overlaps the second gate structure, is spaced apart from the second side, and extends in the direction in which the second side extends.Type: ApplicationFiled: June 29, 2022Publication date: October 20, 2022Inventors: Sidharth Rastogi, Subhash KUCHANURI, Jae Seok YANG, Kwan Young CHUN
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Patent number: 11461521Abstract: An integrated circuit including a standard cell includes: a plurality of first wells extending in a first horizontal direction with a first width and of a first conductivity type; and a plurality of second wells extending in the first horizontal direction with a second width and having a second conductivity type, wherein the plurality of first wells and the plurality of second wells are alternately arranged in a second horizontal direction that is orthogonal to the first horizontal direction, and when m and n are integers greater than or equal to 3, the standard cell has a length in the second horizontal direction, the length being equal to a sum of m times a half of the first width and n times a half of the second width.Type: GrantFiled: May 2, 2019Date of Patent: October 4, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Raheel Azmat, Sidharth Rastogi, Chul-Hong Park, Jae-Seok Yang, Kwan-Young Chun
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Patent number: 11398425Abstract: A semiconductor device includes an insulator on a substrate and having opposite first and second sides that each extend along a first direction, a first fin pattern extending from a third side of the insulator along the first direction, a second fin pattern extending from a fourth side of the insulator along the first direction, and a first gate structure extending from the first side of the insulator along a second direction transverse to the first direction. The device further includes a second gate structure extending from the second side of the insulator along the second direction, a third fin pattern overlapped by the first gate structure, spaced apart from the first side of the insulator, and extending along the first direction, and a fourth fin pattern which overlaps the second gate structure, is spaced apart from the second side, and extends in the direction in which the second side extends.Type: GrantFiled: June 30, 2020Date of Patent: July 26, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sidharth Rastogi, Subhash Kuchanuri, Jae Seok Yang, Kwan Young Chun
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Publication number: 20220077284Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.Type: ApplicationFiled: November 15, 2021Publication date: March 10, 2022Inventors: Young-Hun KIM, Jae Seok YANG, Hae Wang LEE
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Patent number: 11195910Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.Type: GrantFiled: December 10, 2018Date of Patent: December 7, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-Hun Kim, Jae Seok Yang, Hae Wang Lee