Abstract: A semiconductor device includes a substrate, a bit line conductive layer disposed on the substrate and extending in a first lateral direction substantially parallel to a surface of the substrate, first and second channel structures disposed on the bit line conductive layer to be spaced apart from each other in the first lateral direction, first and second gate dielectric layers disposed on side surfaces of the first and second channel structures over the substrate, first and second gate line conductive layers disposed on the first and second gate dielectric layers, respectively, the first and second gate line conductive layers common to the first and second channel structures, respectively, and extending in a second lateral direction perpendicular to the first lateral direction and substantially parallel to the surface of the substrate, and first and second storage node electrode layers disposed over the first and second channel structures, respectively.

Abstract: An airbag device and a method for controlling deployment of the same are proposed. The airbag device is configured to protect a passenger by controlling an airbag cushion deployed toward the rear space of a seatback in an event of a vehicle collision, and the airbag device includes an airbag cushion deploying toward the rear space of the seatback, a sensor part detecting a seating status and a seating posture of a passenger with respect to each seat, and a controller, in an event of a collision, configured to change and control a deploying status of the airbag cushion and an inflation amount of the airbag cushion in response to the seating status and the seating posture of the passenger.

Abstract: Disclosed are a shoulder airbag and an airbag cushion thereof that are capable of restricting an occupant from being moved upward along a seatback and from being abruptly pushed in a direction away from a collision side of a vehicle when vehicle collision occurs, thereby safely protecting the occupant. The shoulder airbag includes an airbag cushion mounted in a seatback and configured to be deployed so as to cover each of the shoulders of an occupant sitting in a seat in three axis directions.

Abstract: A method of manufacturing a semiconductor device comprises: providing a substrate; forming a ferroelectric layer on the substrate; stacking two-dimensional conductive metal-organic frameworks that include cavities on the ferroelectric layer to form a metal-organic framework layer, the cavities of the conductive metal-organic frameworks being disposed to overlap with each other in a thickness direction of the metal-organic framework layer; disposing metal particles within the overlapping cavities to form a charge trap layer; forming a gate insulation layer on the charge trap layer; and forming a gate electrode layer on the gate insulation layer.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate, a channel structure extending in a direction perpendicular to the substrate; a charge storage structure disposed to be in contact with the channel structure; and a cell electrode structure disposed to be in contact with the charge storage structure in a lateral direction, wherein the channel structure comprises a hole conduction layer and an electron conduction layer.

Abstract: A method of providing information on a social networking service (SNS) activity to a chatroom, performed by a user terminal, includes: transmitting, to a server, an SNS request for each of a plurality of anonymous profiles created to be interlinked with an account of a user for an instant messaging service (IMS); displaying information on an SNS activity performed through a first anonymous profile selected by the user in correspondence with a chatroom in which the user participates in the IMS, from among the plurality of anonymous profiles, in the chatroom; receiving an input of changing a profile of the user, selected corresponding to the to chatroom, from the first anonymous profile to a second anonymous profile; and displaying information on an SNS activity performed through the second anonymous profile in the chatroom.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an electrode stack disposed on the substrate, the electrode stack including an interlayer insulation layer and a gate electrode structure that are alternately stacked in a direction perpendicular to the substrate, a trench penetrating the electrode stack to expose sidewall surfaces of the interlayer insulation layer and the gate electrode structure, a gate dielectric layer disposed along a sidewall surface of the trench, the gate dielectric layer including a ferroelectric portion and a non-ferroelectric portion, and a channel layer disposed to adjacent to the gate dielectric layer. The ferroelectric portion is in contact with the gate electrode structure, and the non-ferroelectric portion is in contact with the interlayer insulation layer.

Abstract: A semiconductor device includes a substrate, a ferroelectric layer disposed on the substrate in a vertical direction, a charge trap layer disposed on the ferroelectric layer, a gate insulation layer disposed on the charge trap layer, and a gate electrode layer disposed on the gate insulation layer. The charge trap layer includes a metal-organic framework layer and metal particles embedded in the metal-organic framework layer.

Abstract: A nonvolatile memory device according to an aspect of the present disclosure includes a substrate having a channel layer, a gate dielectric layer structure disposed on the channel layer, a ferroelectric layer disposed on the gate dielectric layer structure, and a gate electrode layer disposed on the ferroelectric layer. The gate dielectric layer structure has a positive capacitance. The ferroelectric layer has a negative capacitance. The gate dielectric layer structure includes a charge tunneling layer, a charge trap layer and a charge barrier layer disposed on the channel layer.

Abstract: A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, a source electrode structure disposed on the substrate, and a channel structure disposed over the substrate and disposed to contact one sidewall surface of the source electrode structure. In addition, the nonvolatile memory device includes a drain electrode structure disposed to contact one sidewall surface of the channel structure over the substrate. In addition, the nonvolatile memory device includes a plurality of ferroelectric structures extending in a first direction perpendicular to the substrate in the channel structure and disposed to be spaced apart from each other along the second direction perpendicular to the first direction. In addition, the nonvolatile memory device includes a gate electrode structure disposed in each of the plurality of ferroelectric structure to extend along the first direction.

Abstract: A semiconductor device according to an embodiment includes a substrate, a bit line structure and a source line structure respectively extending in a direction perpendicular to a surface of the substrate, a semiconductor layer disposed between the bit line structure and the source line structure on a plane parallel to the surface of the substrate, a first ferroelectric layer disposed on a first surface of the semiconductor layer, and a first gate electrode layer disposed on the first ferroelectric layer.

Abstract: A glass article having a glass composition including about 60 mol% to about 70 mol% of SiO2, about 5 mol% to about 15 mol% of Al2O3, about 5 mol% to about 15 mol% of Na2O, about 5 mol% to about 15 mol% of Li2O, about 0 mol% to about 5 mol% of MgO, and about 0 mol% to about 5 mol% of ZrO2 based on a total weight of the glass composition, where a thickness of the glass article is in a range of about 20 µm to about 100 µm, and the glass composition satisfies the following Relational Expression: 0.3 < A12O3/(Na2O + Li2O) ? 1, in which Al2O3, Na2O, and Li2O denote contents (mol%) of respective components in the glass composition.

Abstract: A glass composition article including as a glass composition, wherein the glass composition includes about 60 to about 75 mole percent (mol %) of SiO2, about 3 to about 10 mol % of Al2O3, about 3 to about 10 mol % of Na2O, about 10 to about 25 mol % of Li2O, 0 to about 1 mol % of P2O5, and about 1 to about 5 mol % of ZrO2, wherein each amount is based on 100 mole percent total of the glass composition, wherein a thickness of the glass article is in a range of about 20 micrometers to about 100 micrometers, and wherein the glass composition satisfies Mathematical Expression 1: 0.1<(Al2O3)/(R2O)<0.5??Mathematical Expression 1 wherein (R2O) represents a total mole percent of Na2O and Li2O combined, and (Al2O3) represents mole percent of Al2O3.

Abstract: A semiconductor device according to an embodiment includes a substrate, a bit line structure and a source line structure each extending in a direction perpendicular to a surface of the substrate, a semiconductor layer disposed between the bit line structure and the source line structure on a plane parallel to the surface of the substrate, a ferroelectric layer disposed on the semiconductor layer and including a ferroelectric superlattice structure, and a gate electrode layer disposed on the ferroelectric layer.

Abstract: An electrolyte solution for a lithium secondary battery and a lithium secondary battery including the same are disclosed herein. In some embodiments, an electrolyte solution includes a lithium salt, a nitrogen compound and an organic solvent, wherein the lithium salt comprises bis(trifluoromethanesulfonyl)imide (LiTFSI) and the organic solvent comprises an ether-based solvent. The electrolyte solution can have improved oxidation stability and storage stability at high temperature.

Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.

Abstract: The present technology includes a semiconductor memory device. The semiconductor memory device includes a stack including a conductive pattern and an insulating pattern, a channel structure penetrating the stack, and a memory pattern between the conductive pattern and the channel structure. The memory pattern includes a blocking pattern, a tunnel pattern, a storage pattern, and a ferroelectric pattern.

Abstract: A method of providing information on a social networking service (SNS) activity to a chatroom, performed by a user terminal, includes: transmitting, to a server, an SNS request for each of a plurality of anonymous profiles created to be interlinked with an account of a user for an instant messaging service (IMS); displaying information on an SNS activity performed through a first anonymous profile selected by the user in correspondence with a chatroom in which the user participates in the IMS, from among the plurality of anonymous profiles, in the chatroom; receiving an input of changing a profile of the user, selected corresponding to the chatroom, from the first anonymous profile to a second anonymous profile; and displaying information on an SNS activity performed through the second anonymous profile in the chatroom.

Abstract: A semiconductor device includes a substrate, a ferroelectric layer disposed on the substrate, a gate insulation layer disposed on the ferroelectric layer, metal particles disposed in the gate insulation layer, and a gate electrode layer disposed on the gate insulation layer.

Abstract: A semiconductor device includes a substrate, a ferroelectric layer disposed on the substrate in a vertical direction, a charge trap layer disposed on the ferroelectric layer, a gate insulation layer disposed on the charge trap layer, and a gate electrode layer disposed on the gate insulation layer. The charge trap layer includes a metal-organic framework layer and metal particles embedded in the metal-organic framework layer.