Patents by Inventor Jae Ung LEE
Jae Ung LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088059Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent to the package body, which is electrically connected to the conductive spaced-apart pillar structures.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Young Woo LEE, Jae Ung LEE, Byong Jin KIM, EunNaRa CHO, Ji Hoon OH, Young Seok KIM, Jin Young KHIM, Tae Kyeong HWANG, Jin Seong KIM, Gi Jung KIM
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Patent number: 11855000Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent the package body, which is electrically connected to the conductive spaced-apart pillar structures. In one embodiment, the electrical connection is made through the package.Type: GrantFiled: June 6, 2022Date of Patent: December 26, 2023Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Young Woo Lee, Jae Ung Lee, Byong Jin Kim, EunNaRa Cho, Ji Hoon Oh, Young Seok Kim, Jin Young Khim, Tae Kyeong Hwang, Jin Seong Kim, Gi Jung Kim
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Publication number: 20230257257Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.Type: ApplicationFiled: February 6, 2023Publication date: August 17, 2023Inventors: Yung Woo Lee, Byung Jun Kim, Dong Hyun Bang, EunNaRa Cho, Adrian Arcedera, Jae Ung Lee
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Publication number: 20230118400Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.Type: ApplicationFiled: October 31, 2022Publication date: April 20, 2023Inventors: Jin Seong Kim, Edwin J. Adlam, Ludovico E. Bancod, Gi Jung Kim, Robert Lanzone, Jae Ung Lee, Yung Woo Lee, Mi Kyeong Choi
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Patent number: 11572269Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.Type: GrantFiled: November 2, 2020Date of Patent: February 7, 2023Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Yung Woo Lee, Byung Jun Kim, Dong Hyun Bang, EunNaRa Cho, Adrian Arcedera, Jae Ung Lee
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Patent number: 11488934Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.Type: GrantFiled: December 21, 2020Date of Patent: November 1, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jin Seong Kim, Edwin J. Adlam, Ludovico E. Bancod, Gi Jung Kim, Robert Lanzone, Jae Ung Lee, Yung Woo Lee, Mi Kyeong Choi
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Publication number: 20220302043Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent the package body, which is electrically connected to the conductive spaced-apart pillar structures. In one embodiment, the electrical connection is made through the package.Type: ApplicationFiled: June 6, 2022Publication date: September 22, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Young Woo Lee, Jae Ung Lee, Byong Jin Kim, EunNaRa Cho, Ji Hoon Oh, Young Seok Kim, Jin Young Khim, Tae Kyeong Hwang, Jin Seong Kim, Gi Jung Kim
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Patent number: 11355449Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent the package body, which is electrically connected to the conductive spaced-apart pillar structures. In one embodiment, the electrical connection is made through the package.Type: GrantFiled: April 24, 2020Date of Patent: June 7, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Young Woo Lee, Jae Ung Lee, Byong Jin Kim, EunNaRa Cho, Ji Hoon Oh, Young Seok Kim, Jin Young Khim, Tae Kyeong Hwang, Jin Seong Kim, Gi Jung Kim
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Publication number: 20220051973Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.Type: ApplicationFiled: October 14, 2021Publication date: February 17, 2022Inventors: Jae Ung Lee, Yung Woo Lee, EunNaRa Cho, Dong Hyun Bang, Wook Choi, KooWoong Jeong, Byong Jin Kim, Min Chul Shin, Ho Jeong Lim, Ji Hyun Kim, Chang Hun Kim
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Publication number: 20220009968Abstract: The present disclosure relates to a composition for enhancing the cell permeability and gene correction efficiency of Cas protein and guide RNA. The currently used CRISPR-Cas-based gene correction technology has the problems of difficult intracellular injection in a complex form, unverified stability and low efficiency even after injection, and the off-target problem. In contrast, the composition for gene correction of the present disclosure can be usefully used for gene therapy due to remarkably high intracellular delivery efficiency, inhibited off-target, and ensured stability.Type: ApplicationFiled: December 27, 2019Publication date: January 13, 2022Applicant: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITYInventors: Je-Min CHOI, Ja-Hyun KOO, Hong-Gyun LEE, Jae-Ung LEE
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Patent number: 11152296Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.Type: GrantFiled: July 23, 2018Date of Patent: October 19, 2021Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE LTD.Inventors: Jae Ung Lee, Yung Woo Lee, EunNaRa Cho, Dong Hyun Bang, Wook Choi, KooWoong Jeong, Byong Jin Kim, Min Chul Shin, Ho Jeong Lim, Ji Hyun Kim, Chang Hun Kim
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Publication number: 20210217725Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.Type: ApplicationFiled: December 21, 2020Publication date: July 15, 2021Inventors: Jin Seong Kim, Edwin J. Adlam, Ludovico E. Bancod, Gi Jung Kim, Robert Lanzone, Jae Ung Lee, Yung Woo Lee, Mi Kyeong Choi
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Publication number: 20210047172Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.Type: ApplicationFiled: November 2, 2020Publication date: February 18, 2021Inventors: Yung Woo Lee, Byung Jun Kim, Dong Hyun Bang, EunNaRa Cho, Adrian Arcedera, Jae Ung Lee
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Patent number: 10872879Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.Type: GrantFiled: July 17, 2018Date of Patent: December 22, 2020Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jin Seong Kim, Edwin J. Adlam, Ludovico E. Bancod, Gi Jung Kim, Robert Lanzone, Jae Ung Lee, Yung Woo Lee, Mi Kyeong Choi
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Patent number: 10822226Abstract: A semiconductor package using a polymer substrate is disclosed and may include a polymer cavity structure comprising first metal traces, a micro-electro mechanical systems (MEMS) device and a semiconductor die bonded to a first surface within a cavity of the cavity structure, and a substrate coupled to the cavity structure and comprising second metal traces coupled to the first metal traces. The substrate may enclose the MEMS device and the semiconductor die. Ground traces may be on external surfaces of the polymer cavity structure. Ball lands may be on a surface of the substrate opposite to a surface with the second metal traces. The first metal traces may extend from the first surface of the polymer cavity structure up a sidewall of the cavity and to conductive patterns on a top surface of the polymer cavity structure.Type: GrantFiled: January 23, 2019Date of Patent: November 3, 2020Assignee: AMKOR TECHNOLOGY, INC.Inventors: Yung Woo Lee, Byung Jun Kim, Dong Hyun Bang, EunNaRa Cho, Adrian Arcedera, Jae Ung Lee
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Publication number: 20200251422Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent the package body, which is electrically connected to the conductive spaced-apart pillar structures. In one embodiment, the electrical connection is made through the package.Type: ApplicationFiled: April 24, 2020Publication date: August 6, 2020Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Young Woo LEE, Jae Ung LEE, Byong Jin KIM, EunNaRa CHO, Ji Hoon OH, Young Seok KIM, Jin Young KHIM, Tae Kyeong HWANG, Jin Seong KIM, Gi Jung KIM
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Publication number: 20180374798Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent the package body, which is electrically connected to the conductive spaced-apart pillar structures. In one embodiment, the electrical connection is made through the package.Type: ApplicationFiled: June 24, 2017Publication date: December 27, 2018Applicant: Amkor Technology, Inc.Inventors: Young Woo LEE, Jae Ung LEE, Byong Jin KIM, EunNaRa CHO, Ji Hoon OH, Young Seok KIM, Jin Young KHIM, Tae Kyeong HWANG, Jin Seong KIM, Gi Jung KIM
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Patent number: 10163867Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.Type: GrantFiled: January 15, 2018Date of Patent: December 25, 2018Assignee: Amkor Technology, Inc.Inventors: Jin Seong Kim, Edwin J. Adlam, Ludovico E. Bancod, Gi Jung Kim, Robert Lanzone, Jae Ung Lee, Yung Woo Lee, Mi Kyeong Choi
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Publication number: 20180350734Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.Type: ApplicationFiled: July 23, 2018Publication date: December 6, 2018Inventors: Jae Ung Lee, Yung Woo Lee, EunNaRa Cho, Dong Hyun Bang, Wook Choi, KooWoong Jeong, Byong Jin Kim, Min Chul Shin, Ho Jeong Lim, Ji Hyun Kim, Chang Hun Kim
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Patent number: 10144634Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.Type: GrantFiled: November 7, 2017Date of Patent: December 4, 2018Assignee: Amkor Technology, Inc.Inventors: Jae Ung Lee, Byong Jin Kim, Young Seok Kim, Wook Choi, Seung Jae Yoo, Yung Woo Lee, EunNaRa Cho, Dong Hyun Bang