Patents by Inventor Jain-Hao Lu

Jain-Hao Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6952129
    Abstract: A four-phase dual pumping circuit has a number of stages according to the required output voltage based on an input voltage. Each stage has a first pumping unit and a second pumping unit that are mirror and identical to each other and electrically coupled to each other. The dual pumping circuit is controlled by four-phase clocks which are made from one pair of out of phase clocks. The transistors of the dual pumping circuit have special substrate connection to minimize body effects. The four-phase dual pumping circuit uses NMOSFETS for negative pumping and PMOSFETS for positive pumping.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: October 4, 2005
    Assignee: eMemory Technology Inc.
    Inventors: Hong-chin Lin, Ming-Chih Hsieh, Jain-Hao Lu, Chien-Hung Ho
  • Publication number: 20050151580
    Abstract: A four-phase dual pumping circuit has a number of stages according to the required output voltage based on an input voltage. Each stage has a first pumping unit and a second pumping unit that are mirror and identical to each other and electrically coupled to each other. The dual pumping circuit is controlled by four-phase clocks which are made from one pair of out of phase clocks. The transistors of the dual pumping circuit have special substrate connection to minimize body effects. The four-phase dual pumping circuit uses NMOSFETS for negative pumping and PMOSFETS for positive pumping.
    Type: Application
    Filed: January 12, 2004
    Publication date: July 14, 2005
    Inventors: Hong-chin Lin, Ming-Chih Hsieh, Jain-Hao Lu, Chien-Hung Ho
  • Patent number: 6888400
    Abstract: A charge pump circuit has input and output nodes, a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. A drain of the first transistor and a drain of the second transistor are connected to the input node. A source of the second transistor and a drain of the third transistor are connected to the output node. The first capacitor is connected to a gate of the second transistor. The third transistor is connected to a substrate and a source of the second transistor. When the first transistor is turned on, a voltage at the input node will charge the first capacitor. When the second transistor is turned on, the third transistor is turned on simultaneously so that the substrate and the source of the second transistor will reach the same voltage level. Then, voltage at the input node will charge the second capacitor.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: May 3, 2005
    Assignee: eMemory Technology Inc.
    Inventors: Hong-chin Lin, Nai-Hsien Chen, Jain-Hao Lu, Chien-Hung Ho
  • Publication number: 20040222841
    Abstract: A charge pump circuit has input and output nodes, a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. A drain of the first transistor and a drain of the second transistor are connected to the input node. A source of the second transistor and a drain of the third transistor are connected to the output node. The first capacitor is connected to a gate of the second transistor. The third transistor is connected to a substrate and a source of the second transistor. When the first transistor is turned on, a voltage at the input node will charge the first capacitor. When the second transistor is turned on, the third transistor is turned on simultaneously so that the substrate and the source of the second transistor will reach the same voltage level. Then, voltage at the input node will charge the second capacitor.
    Type: Application
    Filed: July 17, 2003
    Publication date: November 11, 2004
    Inventors: Hong-chin Lin, Nai-Hsien Chen, Jain-Hao Lu, Chien-Hung Ho
  • Patent number: 6642773
    Abstract: A charge pump circuit has input and output nodes, a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. A drain of the first transistor and a drain of the second transistor are connected to the input node. A source of the second transistor and a drain of the third transistor are connected to the output node. The first capacitor is connected to a gate of the second transistor. The third transistor is connected to a substrate and a source of the second transistor. When the first transistor is turned on, a voltage at the input node will charge the first capacitor. When the second transistor is turned on, the third transistor is turned on simultaneously so that the substrate and the source of the second transistor will reach the same voltage level. Then, voltage at the input node will charge the second capacitor.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: November 4, 2003
    Assignee: eMemory Technology Inc.
    Inventors: Hong-Chin Lin, Jain-Hao Lu, Nai-Hsien Chen, Chien-Hung Ho
  • Publication number: 20030160648
    Abstract: A charge pump circuit has input and output nodes, a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. A drain of the first transistor and a drain of the second transistor are connected to the input node. A source of the second transistor and a drain of the third transistor are connected to the output node. The first capacitor is connected to a gate of the second transistor. The third transistor is connected to a substrate and a source of the second transistor. When the first transistor is turned on, a voltage at the input node will charge the first capacitor. When the second transistor is turned on, the third transistor is turned on simultaneously so that the substrate and the source of the second transistor will reach the same voltage level. Then, voltage at the input node will charge the second capacitor.
    Type: Application
    Filed: August 9, 2002
    Publication date: August 28, 2003
    Inventors: Hong-Chin Lin, Jain-Hao Lu, Nai-Hsien Chen, Chien-Hung Ho