Patents by Inventor Jairus Legaspi Pisigan

Jairus Legaspi Pisigan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8148825
    Abstract: An integrated circuit package system includes: providing a lead terminal; forming a dummy lead near the lead terminal; positioning a base integrated circuit adjacent the lead terminal and the dummy lead; connecting a die connector to the base integrated circuit and the dummy lead; mounting a stackable integrated circuit over the base integrated circuit; and connecting another of the die connector to the stackable integrated circuit and the dummy lead.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: April 3, 2012
    Assignee: STATS ChipPAC Ltd.
    Inventors: Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Jairus Legaspi Pisigan, Jeffrey D. Punzalan
  • Patent number: 8148208
    Abstract: A method for manufacturing an integrated circuit package system includes: providing a frame; attaching a leaded package having leads adjacent the frame wherein the leads extend towards a side opposite the frame; and applying a package encapsulant over the leaded package having the leads partially exposed opposite the frame.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: April 3, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Publication number: 20120064668
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base lead having an outer protrusion and an inner protrusion with a recess in between; forming a stack lead having an elongated portion; mounting a base integrated circuit over the inner protrusion or under the elongated portion; mounting the stack lead over the base lead and the base integrated circuit; connecting a stack integrated circuit and the stack lead with the stack integrated circuit over the base integrated circuit; and encapsulating at least a portion of both the base integrated circuit and the stack integrated circuit with the base lead and the stack lead exposed.
    Type: Application
    Filed: November 18, 2011
    Publication date: March 15, 2012
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Patent number: 8129827
    Abstract: An integrated circuit package system includes: forming an external interconnect; connecting an integrated circuit die and the external interconnect; forming a package encapsulation, having a recess, covering the integrated circuit die with a portion of the external interconnect exposed by the recess; and connecting an integrated circuit device and the external interconnect in the recess.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: March 6, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Jairus Legaspi Pisigan, Abelardo Jr Hadap Advincula
  • Patent number: 8106502
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an external interconnect; forming a first planar terminal adjacent to the external interconnect and non-planar to a portion the external interconnect; mounting a first integrated circuit over the first planar terminal; connecting the first integrated circuit with the external interconnect; and forming an encapsulation over the first planar terminal covering the first integrated circuit and with the external interconnect extending from a non-horizontal side of the encapsulation and with the first planar terminal coplanar with the adjacent portion of the encapsulation exposing the first planar terminal.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: January 31, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Lionel Chien Hui Tay
  • Patent number: 8106499
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base conductive material on opposite sides of the base substrate; connecting an internal interconnect having a substantially spherical shape on the base substrate; forming a top substrate having a top conductive material on opposite sides of the top substrate with an upper component thereon facing the base substrate; and attaching the top substrate on the internal interconnect.
    Type: Grant
    Filed: June 20, 2009
    Date of Patent: January 31, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Patent number: 8080867
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base lead having an outer protrusion and an inner protrusion with a recess in between; forming a stack lead having an elongated portion; mounting a base integrated circuit over the inner protrusion or under the elongated portion; mounting the stack lead over the base lead and the base integrated circuit; connecting a stack integrated circuit and the stack lead with the stack integrated circuit over the base integrated circuit; and encapsulating at least a portion of both the base integrated circuit and the stack integrated circuit with the base lead and the stack lead exposed.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: December 20, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Patent number: 8067825
    Abstract: An integrated circuit package system includes providing die; forming leads adjacent the die; forming a die paddle adjacent the leads with the die thereover; and forming a cavity for isolating one of the die and a die attach segment of the die paddle.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: November 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Abelardo Jr. Hadap Advincula, Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Publication number: 20110180928
    Abstract: An integrated circuit package system includes: interconnection pads; a first device mounted below the interconnection pads; a bond wire, or a solder ball connecting the first device to the interconnection pads; a lead connected to the interconnection pad or to the first device; an encapsulation having a top surface encapsulating the first device; and a recess in the top surface of the encapsulation with the interconnection pads exposed therefrom.
    Type: Application
    Filed: April 5, 2011
    Publication date: July 28, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Patent number: 7977780
    Abstract: A package-on-package system includes: providing a bottom package module incorporating a bottom package substrate; attaching a central internal stacking module, incorporating a central interposer, on top of the bottom package module; placing a spacer on the top surface of the central internal stacking module; mounting a first top package module, incorporating a first top interposer with an opening, on the spacer; and enclosing at least portions of the bottom package module, the central internal stacking module, and the first top package module with an encapsulant.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: July 12, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Lionel Chien Hui Tay, Jairus Legaspi Pisigan, Zigmund Ramirez Camacho
  • Patent number: 7977782
    Abstract: An integrated circuit package system includes: forming a lead having a both top contact portion and a bottom contact portion; connecting an integrated circuit die and the lead; and forming a package encapsulation, having a top side and a bottom side, over the integrated circuit die. The forming the package encapsulation includes partially exposing the top contact portion at the top side, and partially exposing the bottom contact portion along the bottom side with the bottom contact portion extending beyond a nonhorizontal portion of the package encapsulation.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: July 12, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Jose Alvin Caparas, Lionel Chien Hui Tay
  • Publication number: 20110140287
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a device over a substrate including a bond wire pad row located between a perimeter of the substrate and the device; configuring the bond wire pad row to include three sided bond wire pads that horizontally overlap; and forming an interconnection between the device and the bond wire pad row.
    Type: Application
    Filed: December 14, 2009
    Publication date: June 16, 2011
    Inventors: Henry Descalzo Bathan, Jairus Legaspi Pisigan, Zigmund Ramirez Camacho
  • Publication number: 20110127661
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming external interconnects having bases of a first thickness and tips of a second thickness extending inwardly directly toward each other; connecting a first circuit device between the tips; attaching a second circuit device to the first circuit device with a combined thickness of the first circuit device and the second circuit device less than the first thickness; and forming an encapsulation of the first thickness between the bases and over the tips.
    Type: Application
    Filed: December 2, 2009
    Publication date: June 2, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Publication number: 20110101542
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base lead having an outer protrusion and an inner protrusion with a recess in between; forming a stack lead having an elongated portion; mounting a base integrated circuit over the inner protrusion or under the elongated portion; mounting the stack lead over the base lead and the base integrated circuit; connecting a stack integrated circuit and the stack lead with the stack integrated circuit over the base integrated circuit; and encapsulating at least a portion of both the base integrated circuit and the stack integrated circuit with the base lead and the stack lead exposed.
    Type: Application
    Filed: October 29, 2009
    Publication date: May 5, 2011
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Patent number: 7932130
    Abstract: An integrated circuit package system includes: providing a die attach paddle with interconnection pads connected to a bottom surface of the die attach paddle; connecting a first device to the interconnection pads with a bond wire; connecting a lead to the interconnection pad or to the first device; encapsulating the first device and the die attach paddle with an encapsulation having a top surface; and etching the die attach paddle leaving a recess in the top surface of the encapsulation.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: April 26, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Patent number: 7915716
    Abstract: An integrated circuit package system includes providing an integrated circuit die; attaching the integrated circuit die over a lead grid having lead blocks; and connecting a die interconnect to the integrated circuit die and the lead blocks.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: March 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Jairus Legaspi Pisigan, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Patent number: 7915724
    Abstract: An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: March 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Jong-Woo Ha, Koo Hong Lee, Soo Won Lee, JuHyun Park, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Publication number: 20100320586
    Abstract: A method of manufacture an integrated circuit packaging system includes: providing a substrate; attaching a base component to the substrate by a first interconnect; attaching a stack component connected by a second interconnect to the substrate and partially over the base component, the second interconnect different from the first interconnect; molding an encapsulation over the base component, the first interconnect, the stack component, and the second interconnect; and removing the substrate to partially expose the first interconnect and the second interconnect from the encapsulation.
    Type: Application
    Filed: June 19, 2009
    Publication date: December 23, 2010
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Jairus Legaspi Pisigan
  • Publication number: 20100320583
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base conductive material on opposite sides of the base substrate; connecting an internal interconnect having a substantially spherical shape on the base substrate; forming a top substrate having a top conductive material on opposite sides of the top substrate with an upper component thereon facing the base substrate; and attaching the top substrate on the internal interconnect.
    Type: Application
    Filed: June 20, 2009
    Publication date: December 23, 2010
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Publication number: 20100264525
    Abstract: A method for manufacturing an integrated circuit package system includes: providing a frame; attaching a leaded package having leads adjacent the frame wherein the leads extend towards a side opposite the frame; and applying a package encapsulant over the leaded package having the leads partially exposed opposite the frame.
    Type: Application
    Filed: June 24, 2010
    Publication date: October 21, 2010
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan, Lionel Chien Hui Tay