Abstract: An integrated circuit 2 includes a transaction master 4 connected via interconnect circuitry 10 to a transaction slave 12. The transaction slave 12 generates a transfer-complete signal (R Last or B) to indicate completion of a data transfer (either a read or a write). When this transfer-complete signal has been received by the transaction master 4, then the transaction master 4 generates a complete-acknowledgement signal RACK, WACK, which is passed back to the transaction slave so as to acknowledge receipt of the transfer-complete signal.

Abstract: The present invention provides a data processing apparatus and method for managing snoop operations. The data processing apparatus has a plurality of processing units for performing data processing operations requiring access to data in shared memory, with at least two of the processing units having a cache associated therewith for storing a subset of the data for access by that processing unit. A snoop-based cache coherency protocol is employed to ensure data accessed by each processing unit is up-to-date, and when an access request is issued the cache coherency protocol is referenced in order to determine whether a snoop process is required. Snoop control storage is provided which defines a plurality of snoop schemes, each snoop scheme defining a series of snoop phases to be performed to implement the snoop process, and each snoop phase requiring a snoop operation to be performed on either a single cache or multiple caches.

Abstract: An on-chip integrated circuit interconnect 16 uses a serialization technique to divide a transaction to be transmitted into a sequence of transmission packets which are serially transmitted over a narrower connection. The order in which bits of the transaction are allocated to transmission packets is selected such that higher priority bits required by a receiving slave device in order that it can commence processing the transaction are sent first. This reduces the latency of the system.

Abstract: An integrated circuit 2 includes a transaction master 4 connected via interconnect circuitry 10 to a transaction slave 12. The transaction slave 12 generates a transfer-complete signal (R Last or B) to indicate completion of a data transfer (either a read or a write). When this transfer-complete signal has been received by the transaction master 4, then the transaction master 4 generates a complete-acknowledgement signal RACK, WACK, which is passed back to the transaction slave so as to acknowledge receipt of the transfer-complete signal.

Abstract: A data processing apparatus comprises at least one source processor core, at least two destination processor cores, a message handler and a bus arrangement providing a data communication path between the source core, the destination cores and the message handler. The message handler has plurality of message-handling modules. At least one of the message-handling modules has a message receipt indicator that is modifiable by each of the destination processor cores to indicate that a message has been received at its destination. This message-handling module also has a transmission completion detector operable to detect, in dependence upon a message receipt indicator value that a message has been received by all of the at least two destination processor cores and to initiate transmission of an acknowledgement signal to the source processor core.

Abstract: A data processing apparatus and method of handling write transactions in such an apparatus is provided. The apparatus has a plurality of devices, and bus circuitry providing connection paths between the plurality of devices. At least one of the devices has a bus master interface operable to generate write transactions for output via the bus circuitry, whilst at least one of the devices has a bus slave interface operable to receive the write transactions from the bus circuitry. A write transaction includes transferring a write address from a bus master interface to a bus slave interface and separately transferring write data from the bus master interface to the bus slave interface. In accordance with embodiments of the present invention, the bus master interface is allowed to generate a write transaction such that the write data is received at the bus slave interface before the associated write address. This leads to a significant decrease in the complexity of the apparatus.

Abstract: A method and system for providing targeted advertising in public places and carriers such as trains, buses, train stations, shopping malls, airports, etc. The demographics, purchasing history and/or personal preferences of individuals in the public place are collected from personal digital assistants (PDAs) or other wireless communication devices carried by the individuals in the public place or public carrier. The collected data pertaining to a group of individuals who are present near the display device, is processed and used to select appropriate advertisements that would most likely interest that group of individuals. The selected advertisements are displayed on the display device located in the public place or public carrier so as to provide targeted advertising to the group of individuals.

Abstract: An apparatus for arbitration within a data processing apparatus between a plurality of transfers to be routed over a corresponding plurality of paths provided by an interconnect circuit. The plurality of paths include a shared connection, the data processing apparatus having a plurality of initiator logic elements for initiating transfers and a plurality of recipient logic elements for receiving transfers, for each transfer the corresponding path coupling the initiator logic element responsible for initiating that transfer with the recipient logic element destined to receive that transfer. The apparatus provides arbitration logic with an indication as to whether the ready signal from a storage element has been asserted, and employs the arbitration logic to select, in dependence on predetermined criteria including at least that indication, one of the plurality of transfers for routing via the shared connection.

Abstract: A bus master 2, 4 sends write transactions to a bus slave 8 which include separate write addresses AW and write data WD. Write transaction identifiers AWID, WID are associated with these write addresses and write data. The bus slave can accept multiple write addresses such that there can be copending write transactions to the same bus slave. The bus slave uses the write transaction identifiers to correlate interleaved write data for the co-pending write transactions with their write addresses.

Abstract: A data processing system is provided with a bus having separate write channels W and read channels R via which bus transactions are made. Bus transaction buffers 34 are provided within the bus structure to buffer write requests, particularly so as to alleviate problems associated with relatively slow bus slaves. The bus transaction buffers 34 are responsive to the memory addresses associated with write requests and read requests which pass through them to identify those to the same memory address, or memory addresses within a predetermined range, so as to either ensure a strict correct ordering of those transactions, read to follow write, or to satisfy a read following a write with a buffered write data value and then flushing the read request such that it does not reach its final destination.

Abstract: An integrated circuit 2 is provided with multiple bus masters 4, 6 and multiple bus slaves 8, 10, 12, communicating via a multi-channel communication bus. A separate write data channel, read data channel and write response channel are provided as well as a separate write address channel and a read address channel. The provision of a dedicated write response channel frees the read data channel to be more efficiently used for the transfer of read data. Transactions may be burst mode transactions with a single write response corresponding to the write transaction as a whole.

Abstract: A method of arbitration within a data processing apparatus between a plurality of transfers to be routed over a corresponding plurality of paths provided by an interconnect circuit. The plurality of paths include a shared connection, the data processing apparatus having a plurality of initiator logic elements for initiating transfers and a plurality of recipient logic elements for receiving transfers, for each transfer the corresponding path coupling the initiator logic element responsible for initiating that transfer with the recipient logic element destined to receive that transfer. The method comprises the steps of providing to arbitration logic an indication as to whether the ready signal from a storage element has been asserted, and employing the arbitration logic to select, in dependence on predetermined criteria including at least that indication, one of the plurality of transfers for routing via the shared connection.

Abstract: A method and design tool are provided for modifying a design of a bus interconnect block for a data processing apparatus in order to meet a requirement for a chosen characteristic of the bus interconnect block. The bus interconnect block provides a plurality of connections via which one or more master devices may access one or more slave devices, each connection comprising one or more paths, and each path having one or more path portions separated by storage elements. The method comprises the steps of: (a) selecting one or more candidate paths from said paths; (b) for each candidate path, applying predetermined criteria to determine whether modification of the number of storage elements in said path will assist in meeting the requirement for said chosen characteristic; and (c) modifying the number of storage elements in each candidate path for which it is determined at said step (b) that modification will assist in meeting the requirement for said chosen characteristic.

Abstract: A data processing apparatus and method of configuration of such an apparatus are provided, the apparatus comprising a plurality of logic elements for processing data, a plurality of storage elements for temporarily storing data, and a plurality of connections from which data is passed between the logic elements. Each connection comprises one or more path portions separated by the storage elements. A number of the storage elements are selectable storage elements having a bypass path associated therewith, and a controller is provided for controlling the selection of each selectable storage element or its associated bypass path based on setup information, in order to enable a change in the number of path portions within one or more of the connections.

Abstract: Techniques are disclosed for detecting shoplifting or theft, particularly in a retail environment, using radio-frequency identification (“RFID”). Preferred embodiments leverage RFID tags on merchandise and RFID data that is written at the point of sale on the merchandise-borne RFID tags themselves, on the customer's receipt, or both. Some embodiments also leverage RFID tags on customer identification or “loyalty” cards. After writing RFID data on the merchandise-borne tags and/or receipt, a matching operation is performed at an RFID reader when the shopper and his merchandise exit the premises, in order to determine whether the shopper has paid for the items in his possession.

Abstract: As a user navigates through a sequence of screens by selecting certain “aid” keys, a graph will be built reflecting the navigation history of the user. When a user requests a certain screen by selecting a particular key, screen data is received from a host on a web server. The screen data for the requested screen is compared to the screen data for the screen(s) in the graph associated with the selected key. If a match is established, the user has visited this screen before and its data has already been converted (e.g., scraped). As such, the screen can be retrieved from storage and served to the user. If, however, a match cannot be established, the requested screen will be converted and stored, and the graph will be updated.

Abstract: Techniques are disclosed for detecting shoplifting or theft, particularly in a retail environment, using radio-frequency identification (“RFID”). Preferred embodiments leverage RFID tags on merchandise and RFID data that is written at the point of sale on the merchandise-borne RFID tags themselves, on the customer's receipt, or both. Some embodiments also leverage RFID tags on customer identification or “loyalty” cards. After writing RFID data on the merchandise-borne tags and/or receipt, a matching operation is performed at an RFID reader when the shopper and his merchandise exit the premises, in order to determine whether the shopper has paid for the items in his possession.

Abstract: Techniques are disclosed for detecting shoplifting or theft, particularly in a retail environment, using radio-frequency identification (“RFID”). Preferred embodiments leverage RFID tags on merchandise and RFID data that is written at the point of sale on the merchandise-borne RFID tags themselves, on the customer's receipt, or both. Some embodiments also leverage RFID tags on customer identification or “loyalty” cards. After writing RFID data on the merchandise-borne tags and/or receipt, a matching operation is performed at an RFID reader when the shopper and his merchandise exit the premises, in order to determine whether the shopper has paid for the items in his possession.

Abstract: A method, system and apparatus for collectively tracking a lost, misplaced or stolen personal article. The method can include distributing a multiplicity of tracking processors to corresponding subscribers in a personal article tracking community. An indication can be received from one of the subscribers in the community that a personal article having an RFID tag has fallen out of range of a tracking processor associated with the one of the subscribers. An identifier for the RFID tag can be forwarded to other subscribers in the community. Subsequently, notification can be received from at least one of the other subscribers that the RFID tag has been sensed in proximity to a tracking processor coupled to the at least one of the other subscribers.

Abstract: A personal articles tracking system, method and apparatus. In the system of the invention, a radio frequency identification (RFID) reader can be coupled to a tracking processor. A data store further can be configured to store tag data from corresponding RFID tags. Finally, an alert can be programmed to activate when the tracking processor no longer can sense within range of the RFID reader an RFID tag having corresponding tag data stored in the data store.