Patents by Inventor James Dowling
James Dowling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12157435Abstract: A storage tunnel assembly for the bed of a pickup truck or other vehicle. The storage tunnel assembly generally includes a deployable vertical wall separated from a bulkhead of the bed and disposed across a width of the bed and a deployable cover separated from a floor of the bed between the vertical wall and the bulkhead and disposed across the width of the bed. The vertical wall, the cover, the bulkhead, and the floor define a storage space within a space defined by the bed. The vertical wall and the cover may be fixed components, separate components, and/or hinged components in various assemblies. One or both side walls of the bed define a storage tunnel access opening coincident with the storage space defined by the vertical wall, the cover, the bulkhead, and the floor and may include a door adapted to selectively open and close the associated storage tunnel access opening.Type: GrantFiled: May 26, 2022Date of Patent: December 3, 2024Assignee: Rivian IP Holdings, LLCInventors: James Dowle, Barry Lett, Nick Malachowski, Mark Taylor, Philipp Wolf
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Patent number: 12113069Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.Type: GrantFiled: September 1, 2022Date of Patent: October 8, 2024Assignee: Murata Manufacturing Co., Ltd.Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
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Patent number: 11953438Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.Type: GrantFiled: June 17, 2022Date of Patent: April 9, 2024Assignee: STRECK LLCInventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
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Publication number: 20230382309Abstract: A storage tunnel assembly for the bed of a pickup truck or other vehicle. The storage tunnel assembly generally includes a deployable vertical wall separated from a bulkhead of the bed and disposed across a width of the bed and a deployable cover separated from a floor of the bed between the vertical wall and the bulkhead and disposed across the width of the bed. The vertical wall, the cover, the bulkhead, and the floor define a storage space within a space defined by the bed. The vertical wall and the cover may be fixed components, separate components, and/or hinged components in various assemblies. One or both side walls of the bed define a storage tunnel access opening coincident with the storage space defined by the vertical wall, the cover, the bulkhead, and the floor and may include a door adapted to selectively open and close the associated storage tunnel access opening.Type: ApplicationFiled: May 26, 2022Publication date: November 30, 2023Inventors: James Dowle, Barry Lett, Nick Malachowski, Mark Taylor, Philipp Wolf
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Publication number: 20230072271Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.Type: ApplicationFiled: September 1, 2022Publication date: March 9, 2023Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
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Publication number: 20220326157Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.Type: ApplicationFiled: June 17, 2022Publication date: October 13, 2022Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
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Patent number: 11437404Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.Type: GrantFiled: December 16, 2020Date of Patent: September 6, 2022Assignee: pSemi CorporationInventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
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Patent number: 11402110Abstract: A pressure equalization device for installation on or at an entry of an attic of a home or other building is described. The pressure equalization device can be an access panel of an attic access hatch. The access panel is a solid, generally flat panel of material such as wood or plastic. The access panel includes an aperture that passes therethrough. The aperture is covered with an air-permeable cover made from a material such as cloth or plastic mesh. The mesh is constructed to allow air to pass through the aperture between the attic and interior of the building for purposes of equalizing pressure between them. Pores of the mesh are sized so that insects, rodents, and other animals and dust and debris cannot pass through and into the interior of the building.Type: GrantFiled: June 24, 2020Date of Patent: August 2, 2022Inventor: James Dowling
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Patent number: 11385178Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.Type: GrantFiled: June 25, 2018Date of Patent: July 12, 2022Assignee: STRECK, INC.Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
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Publication number: 20210404674Abstract: A pressure equalization device for installation on or at an entry of an attic of a home or other building is described. The pressure equalization device can be an access panel of an attic access hatch. The access panel is a solid, generally flat panel of material such as wood or plastic. The access panel includes an aperture that passes therethrough. The aperture is covered with an air-permeable cover made from a material such as cloth or plastic mesh. The mesh is constructed to allow air to pass through the aperture between the attic and interior of the building for purposes of equalizing pressure between them. Pores of the mesh are sized so that insects, rodents, and other animals and dust and debris cannot pass through and into the interior of the building.Type: ApplicationFiled: June 24, 2020Publication date: December 30, 2021Inventor: James Dowling
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Publication number: 20210217776Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.Type: ApplicationFiled: December 16, 2020Publication date: July 15, 2021Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
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Publication number: 20210171294Abstract: A detachable, self-contained robotic arm system includes: a mounting subsystem configured to releasable engage an operating platform; a robotic arm subsystem coupled to the mounting subsystem; a control subsystem coupled to the mounting subsystem and configured to effectuate movement of the robotic arm assembly; and a connectivity subsystem configured to detachably couple the detachable, self-contained robotic arm system to one or more external systems.Type: ApplicationFiled: December 4, 2020Publication date: June 10, 2021Inventors: Brian Hart, Martin Cosgrove, James Dowling, Richard Hart, Ryan Mulley, Jonathan Roche
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Patent number: 10658386Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.Type: GrantFiled: July 19, 2018Date of Patent: May 19, 2020Assignee: pSemi CorporationInventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
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Publication number: 20200027898Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.Type: ApplicationFiled: July 19, 2018Publication date: January 23, 2020Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
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Patent number: 10220879Abstract: A vehicle with a load space to provide a chassis comprising a framework (10) comprising a pair of spaced-apart elongate longitudinal members (12, 14) connected by a pair of spaced-apart elongate lateral members (20, 22) and bracing for the thus-defined framework, a rear suspension attached to the rearmost lateral member (20) and comprising a trailing-arm arrangement (52), and a front suspension attached to the front most lateral member (22) and comprising a leading-arm arrangement (58). This creates a rigid core for the chassis, which also provides all four suspension mounting points.Type: GrantFiled: July 8, 2015Date of Patent: March 5, 2019Assignee: GORDON MURRAY DESIGN LIMITEDInventors: James Dowle, Frank Coppuck, Ian Gordon Murray
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Publication number: 20180306719Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.Type: ApplicationFiled: June 25, 2018Publication date: October 25, 2018Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
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Patent number: 10052890Abstract: A method is provided. The method includes printing a target on a medium and defining at least one intended cutting line on the medium. The target includes at least one graphical element which defines at least one reference distance measure. The target is centered at the intended cutting line or has a defined distance to the intended cutting line.Type: GrantFiled: April 17, 2015Date of Patent: August 21, 2018Assignee: Hewlett-Packard Development Company, L.P.Inventors: Joan Solans, Charlie Yang, James Dowling
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Patent number: 10006861Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.Type: GrantFiled: June 30, 2014Date of Patent: June 26, 2018Assignee: Streck, Inc.Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
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Publication number: 20180022118Abstract: A method is provided. The method includes printing a target on a medium and defining at least one intended cutting line on the medium. The target includes at least one graphical element which defines at least one reference distance measure. The target is centered at the intended cutting line or has a defined distance to the intended cutting line.Type: ApplicationFiled: April 17, 2015Publication date: January 25, 2018Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Joan Solans, Charlie Yang, James Dowling
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Publication number: 20170197658Abstract: A vehicle with a load space to provide a chassis comprising a framework (10) comprising a pair of spaced-apart elongate longitudinal members (12, 14) connected by a pair of spaced-apart elongate lateral members (20, 22) and bracing for the thus-defined framework, a rear suspension attached to the rearmost lateral member (20) and comprising a trailing-arm arrangement (52), and a front suspension attached to the front most lateral member (22) and comprising a leading-arm arrangement (58). This creates a rigid core for the chassis, which also provides all four suspension mounting points.Type: ApplicationFiled: July 8, 2015Publication date: July 13, 2017Inventors: James Dowle, Frank Coppuck, Ian Gordon Murray