Patents by Inventor James Dowling

James Dowling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12157435
    Abstract: A storage tunnel assembly for the bed of a pickup truck or other vehicle. The storage tunnel assembly generally includes a deployable vertical wall separated from a bulkhead of the bed and disposed across a width of the bed and a deployable cover separated from a floor of the bed between the vertical wall and the bulkhead and disposed across the width of the bed. The vertical wall, the cover, the bulkhead, and the floor define a storage space within a space defined by the bed. The vertical wall and the cover may be fixed components, separate components, and/or hinged components in various assemblies. One or both side walls of the bed define a storage tunnel access opening coincident with the storage space defined by the vertical wall, the cover, the bulkhead, and the floor and may include a door adapted to selectively open and close the associated storage tunnel access opening.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: December 3, 2024
    Assignee: Rivian IP Holdings, LLC
    Inventors: James Dowle, Barry Lett, Nick Malachowski, Mark Taylor, Philipp Wolf
  • Patent number: 12113069
    Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: October 8, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
  • Patent number: 11953438
    Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: April 9, 2024
    Assignee: STRECK LLC
    Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
  • Publication number: 20230382309
    Abstract: A storage tunnel assembly for the bed of a pickup truck or other vehicle. The storage tunnel assembly generally includes a deployable vertical wall separated from a bulkhead of the bed and disposed across a width of the bed and a deployable cover separated from a floor of the bed between the vertical wall and the bulkhead and disposed across the width of the bed. The vertical wall, the cover, the bulkhead, and the floor define a storage space within a space defined by the bed. The vertical wall and the cover may be fixed components, separate components, and/or hinged components in various assemblies. One or both side walls of the bed define a storage tunnel access opening coincident with the storage space defined by the vertical wall, the cover, the bulkhead, and the floor and may include a door adapted to selectively open and close the associated storage tunnel access opening.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: James Dowle, Barry Lett, Nick Malachowski, Mark Taylor, Philipp Wolf
  • Publication number: 20230072271
    Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 9, 2023
    Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
  • Publication number: 20220326157
    Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.
    Type: Application
    Filed: June 17, 2022
    Publication date: October 13, 2022
    Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
  • Patent number: 11437404
    Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: September 6, 2022
    Assignee: pSemi Corporation
    Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
  • Patent number: 11402110
    Abstract: A pressure equalization device for installation on or at an entry of an attic of a home or other building is described. The pressure equalization device can be an access panel of an attic access hatch. The access panel is a solid, generally flat panel of material such as wood or plastic. The access panel includes an aperture that passes therethrough. The aperture is covered with an air-permeable cover made from a material such as cloth or plastic mesh. The mesh is constructed to allow air to pass through the aperture between the attic and interior of the building for purposes of equalizing pressure between them. Pores of the mesh are sized so that insects, rodents, and other animals and dust and debris cannot pass through and into the interior of the building.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: August 2, 2022
    Inventor: James Dowling
  • Patent number: 11385178
    Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: July 12, 2022
    Assignee: STRECK, INC.
    Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
  • Publication number: 20210404674
    Abstract: A pressure equalization device for installation on or at an entry of an attic of a home or other building is described. The pressure equalization device can be an access panel of an attic access hatch. The access panel is a solid, generally flat panel of material such as wood or plastic. The access panel includes an aperture that passes therethrough. The aperture is covered with an air-permeable cover made from a material such as cloth or plastic mesh. The mesh is constructed to allow air to pass through the aperture between the attic and interior of the building for purposes of equalizing pressure between them. Pores of the mesh are sized so that insects, rodents, and other animals and dust and debris cannot pass through and into the interior of the building.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 30, 2021
    Inventor: James Dowling
  • Publication number: 20210217776
    Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.
    Type: Application
    Filed: December 16, 2020
    Publication date: July 15, 2021
    Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
  • Publication number: 20210171294
    Abstract: A detachable, self-contained robotic arm system includes: a mounting subsystem configured to releasable engage an operating platform; a robotic arm subsystem coupled to the mounting subsystem; a control subsystem coupled to the mounting subsystem and configured to effectuate movement of the robotic arm assembly; and a connectivity subsystem configured to detachably couple the detachable, self-contained robotic arm system to one or more external systems.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 10, 2021
    Inventors: Brian Hart, Martin Cosgrove, James Dowling, Richard Hart, Ryan Mulley, Jonathan Roche
  • Patent number: 10658386
    Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: May 19, 2020
    Assignee: pSemi Corporation
    Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
  • Publication number: 20200027898
    Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.
    Type: Application
    Filed: July 19, 2018
    Publication date: January 23, 2020
    Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
  • Patent number: 10220879
    Abstract: A vehicle with a load space to provide a chassis comprising a framework (10) comprising a pair of spaced-apart elongate longitudinal members (12, 14) connected by a pair of spaced-apart elongate lateral members (20, 22) and bracing for the thus-defined framework, a rear suspension attached to the rearmost lateral member (20) and comprising a trailing-arm arrangement (52), and a front suspension attached to the front most lateral member (22) and comprising a leading-arm arrangement (58). This creates a rigid core for the chassis, which also provides all four suspension mounting points.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: March 5, 2019
    Assignee: GORDON MURRAY DESIGN LIMITED
    Inventors: James Dowle, Frank Coppuck, Ian Gordon Murray
  • Publication number: 20180306719
    Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
  • Patent number: 10052890
    Abstract: A method is provided. The method includes printing a target on a medium and defining at least one intended cutting line on the medium. The target includes at least one graphical element which defines at least one reference distance measure. The target is centered at the intended cutting line or has a defined distance to the intended cutting line.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: August 21, 2018
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Joan Solans, Charlie Yang, James Dowling
  • Patent number: 10006861
    Abstract: An improved device and system for facilitating polymerase chain reaction including a light source, detector, waveguide, and filters that occupy minimal space and facilitate detection of stationary samples, reduced sample read time, and simultaneous reading of multiple light wavelengths.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: June 26, 2018
    Assignee: Streck, Inc.
    Inventors: Matthew R. Kreifels, Scott E. Whitney, Gregg Wilder, John Flanagan, James Dowling, Philip Hills, Michael Tilleman, Jeremie Jackson
  • Publication number: 20180022118
    Abstract: A method is provided. The method includes printing a target on a medium and defining at least one intended cutting line on the medium. The target includes at least one graphical element which defines at least one reference distance measure. The target is centered at the intended cutting line or has a defined distance to the intended cutting line.
    Type: Application
    Filed: April 17, 2015
    Publication date: January 25, 2018
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Joan Solans, Charlie Yang, James Dowling
  • Publication number: 20170197658
    Abstract: A vehicle with a load space to provide a chassis comprising a framework (10) comprising a pair of spaced-apart elongate longitudinal members (12, 14) connected by a pair of spaced-apart elongate lateral members (20, 22) and bracing for the thus-defined framework, a rear suspension attached to the rearmost lateral member (20) and comprising a trailing-arm arrangement (52), and a front suspension attached to the front most lateral member (22) and comprising a leading-arm arrangement (58). This creates a rigid core for the chassis, which also provides all four suspension mounting points.
    Type: Application
    Filed: July 8, 2015
    Publication date: July 13, 2017
    Inventors: James Dowle, Frank Coppuck, Ian Gordon Murray