Patents by Inventor James E. C. Brown
James E. C. Brown has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20130249505Abstract: Embodiments for methods, apparatus and systems for operating a voltage regulator are disclosed. One embodiment of the voltage regulator generates a switching voltage through controlled closing and opening of a series switch element and a shunt switch element. The voltage regulator further includes a switched output filter that includes a plurality of capacitors for filtering the switching voltage and generating an output voltage. A mode controller is operative to disconnect at least one of the plurality of capacitors upon receiving a first indicator, where disconnecting causes the at least one of the plurality of capacitors to electrically float, wherein while the at least one capacitor is disconnected the output voltage is changed from a first value to a second value, return the output voltage to a first value or a third value upon receiving a second indicator, and reconnect the at least one of the plurality of capacitors.Type: ApplicationFiled: May 1, 2013Publication date: September 26, 2013Applicant: R2 SEMICONDUCTOR, INC.Inventors: James E.C. Brown, Daniel Dobkin, Pablo Moreno Galbis, Cory Severson, David Fisher
-
Patent number: 8508207Abstract: Embodiments for methods and apparatuses for controlling a skew time of switches of a switching voltage regulator are disclosed. One method includes generating a switching voltage through closing and opening of a series switch and a shunt switch as controlled by a series switch control signal and a shunt switch control signal. An error signal is generated that is proportional to a relative displacement of an on-interval of the series switch and an off-interval of the shunt switch. A relative delay of the series switch control signal and the shunt switch control signal is adjusted based on the error signal, and a regulated output voltage is generated based upon the switching voltage.Type: GrantFiled: April 19, 2011Date of Patent: August 13, 2013Assignee: R2 SemiconductorInventors: Lawrence M. Burns, James E. C. Brown
-
Patent number: 8395362Abstract: Embodiments for at least one method and apparatus of controlling a dead time of a switching voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The method included generating the switching voltage through controlled closing and opening of a series switch element and a shunt switch element, wherein the dead time comprises time that both the series switch element and the shunt switch element are open. The duration of the dead time is adjusted based on a rate of change of the switching voltage.Type: GrantFiled: October 29, 2010Date of Patent: March 12, 2013Assignee: R2 Semiconductor, Inc.Inventors: James E. C. Brown, Lawrence M. Burns
-
Publication number: 20120326680Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One method includes generating the regulated voltage through controlled closing and opening of a series switch element and shunt switch element. This method includes closing the series switch element during a first period, the series switch element comprising a plurality of series switch elements segments. The method includes applying a switching gate voltage to gates of series switching transistors of a subset of the plurality of series switch elements segments of the series switch element, wherein only the series switching transistors of the subset of the plurality of series switch elements segments of the series switch element turn on, while series protection transistor of more than the subset of the plurality of series switch elements segments of the series switch element turn on. The shunt switch element during is closed during a second period.Type: ApplicationFiled: September 5, 2012Publication date: December 27, 2012Applicant: R2 SEMICONDUCTOR, INC.Inventors: Lawrence M. Burns, James E.C. Brown
-
Patent number: 8339115Abstract: Embodiments for at least one method and apparatus of controlling a bypass resistance of a voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The switching voltage is generated through controlled closing and opening of a series switch element and a shunt switch element, the series switch element and the shunt switch element being connected between voltages based on an input voltage. Control of a duty cycle of the switching voltage is provided by sensing and feeding back the regulated output voltage. The bypass resistance is controlled based on an integration of a difference between the duty cycle and a maximum duty cycle.Type: GrantFiled: July 5, 2012Date of Patent: December 25, 2012Assignee: R2 Semiconductor, Inc.Inventors: James E. C. Brown, Bret Rothenberg, Lawrence M. Burns
-
Publication number: 20120293156Abstract: Methods, apparatuses and systems for assisting an output current of a voltage converter, are disclosed. One method includes detecting a request for a positive change in an output voltage of the voltage converter, selecting an output current assist value based on the requested positive change in the output voltage, for a predetermined load, and assisting the output current with the selected output assist current.Type: ApplicationFiled: June 21, 2012Publication date: November 22, 2012Applicant: R2 SEMICONDUCTOR, INC.Inventors: Pablo Moreno Galbis, James E.C. Brown
-
Publication number: 20120274297Abstract: Embodiments for at least one method and apparatus of controlling a bypass resistance of a voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The switching voltage is generated through controlled closing and opening of a series switch element and a shunt switch element, the series switch element and the shunt switch element being connected between voltages based on an input voltage. Control of a duty cycle of the switching voltage is provided by sensing and feeding back the regulated output voltage. The bypass resistance is controlled based on an integration of a difference between the duty cycle and a maximum duty cycle.Type: ApplicationFiled: July 5, 2012Publication date: November 1, 2012Applicant: R2 SEMICONDUCTOR, INC.Inventors: James E.C. Brown, Bret Rothenberg, Lawrence M. Burns
-
Publication number: 20120244916Abstract: Embodiments for at methods, apparatus and systems for operating a voltage regulator are disclosed. One method includes generating, by a switching controller, a switching voltage through controlled closing and opening of a series switch element and a shunt switch element. Further, the method includes generating, by a switchable output filter, a regulated output voltage by filtering the switching voltage, wherein the switchable output filter comprises a plurality of capacitors that are selectively included within the switchable output filter.Type: ApplicationFiled: February 18, 2012Publication date: September 27, 2012Applicant: R2 SEMICONDUCTOR, INC.Inventors: James E. C. Brown, Daniel Dobkin, Pablo Moreno Galbis, Cory Severson, Lawrence M. Burns
-
Patent number: 8248044Abstract: Embodiments for at least one method and apparatus of controlling a bypass resistance of a voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The switching voltage is generated through controlled closing and opening of a series switch element and a shunt switch element, the series switch element and the shunt switch element being connected between voltages based on an input voltage. A control of a duty cycle of the switching voltage is provided by sensing and feeding back the regulated output voltage. The bypass resistance is controlled based on a parameter related to the duty cycle, wherein the control of the duty cycle is persistent during the control of the bypass resistance.Type: GrantFiled: March 24, 2010Date of Patent: August 21, 2012Assignee: R2 Semiconductor, Inc.Inventors: James E. C. Brown, Bret Rothenberg, Lawrence M. Burns
-
Publication number: 20120105039Abstract: Embodiments for at least one method and apparatus for controlling timing of switch control signals of a switching voltage regulator disclosed. One method includes generating a regulated output voltage based upon a switching voltage, generating the switching voltage through controlled closing and opening of a series switch element and a shunt switch element, and controlling, by a delay block, the closing and opening of the series switch element and a shunt switch element. The delay block control includes receiving, by the delay block, a timing signal, generating a one of a series switch control signal and a shunt switch control signal by controllably delaying the timing signal with a first delay, and generating one other of the series switch control signal and the shunt switch control signal by inverting, and controllably delaying the timing signal with a second delay.Type: ApplicationFiled: September 3, 2011Publication date: May 3, 2012Applicant: R2 SEMICONDUCTOR, INC.Inventor: James E.C. Brown
-
Publication number: 20120105045Abstract: Embodiments for methods and apparatuses for controlling a skew time of switches of a switching voltage regulator are disclosed. One method includes generating a switching voltage through closing and opening of a series switch and a shunt switch as controlled by a series switch control signal and a shunt switch control signal. An error signal is generated that is proportional to a relative displacement of an on-interval of the series switch and an off-interval of the shunt switch. A relative delay of the series switch control signal and the shunt switch control signal is adjusted based on the error signal, and a regulated output voltage is generated based upon the switching voltage.Type: ApplicationFiled: April 19, 2011Publication date: May 3, 2012Applicant: R2 SEMICONDUCTOR, INC.Inventors: Lawrence M. Burns, James E.C. Brown
-
Publication number: 20120105034Abstract: Embodiments for at least one method and apparatus of controlling a dead time of a switching voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The method included generating the switching voltage through controlled closing and opening of a series switch element and a shunt switch element, wherein the dead time comprises time that both the series switch element and the shunt switch element are open. The duration of the dead time is adjusted based on a rate of change of the switching voltage.Type: ApplicationFiled: October 29, 2010Publication date: May 3, 2012Applicant: R2 SEMICONDUCTOR, INC.Inventors: James E. C. Brown, Lawrence M. Burns
-
Publication number: 20110234187Abstract: Embodiments for at least one method and apparatus of controlling a bypass resistance of a voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The switching voltage is generated through controlled closing and opening of a series switch element and a shunt switch element, the series switch element and the shunt switch element being connected between voltages based on an input voltage. A control of a duty cycle of the switching voltage is provided by sensing and feeding back the regulated output voltage. The bypass resistance is controlled based on a parameter related to the duty cycle, wherein the control of the duty cycle is persistent during the control of the bypass resistance.Type: ApplicationFiled: March 24, 2010Publication date: September 29, 2011Applicant: R2 Semiconductor, Inc.Inventors: James E. C. Brown, Bret Rothenberg, Lawrence M. Burns
-
Patent number: 7127020Abstract: A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.Type: GrantFiled: May 9, 2003Date of Patent: October 24, 2006Assignee: Texas Instruments IncorporatedInventor: James E. C. Brown
-
Patent number: 7123666Abstract: A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.Type: GrantFiled: May 9, 2003Date of Patent: October 17, 2006Assignee: Texas Instruments IncorporatedInventors: James E. C. Brown, Bret Rothenberg, Chienkuo Vincent Tien
-
Patent number: 7123665Abstract: A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.Type: GrantFiled: May 9, 2003Date of Patent: October 17, 2006Assignee: Texas Instruments IncorporatedInventors: James E. C. Brown, Bret Rothenberg
-
Patent number: 6950480Abstract: A method and apparatus for balancing I/Q gain and I/Q phase in a signal receiver. The receiver includes an IQ coefficient calculator, an IQ balancer, and a latency time delay device. The latency time delay device delays I and Q signals by a latency time period. During the latency time the IQ coefficient calculator uses the I and Q signals during a section of the packets corresponding to the latency time period for computing correction coefficients. The IQ balancer receives the I and Q signals after the latency time period and applies the correction coefficients to the entire packet of I and Q signals.Type: GrantFiled: January 24, 2003Date of Patent: September 27, 2005Assignee: Texas Instruments IncorporatedInventor: James E. C. Brown
-
Patent number: 6940930Abstract: A method and apparatus for balancing I/Q gain and I/Q phase in a signal receiver. The receiver includes an IQ coefficient calculator and an IQ balancer. The IQ coefficient calculator computes a set of correction coefficients for each packet from the I and Q signals in an IQ measurement section at the front of the packet. The IQ balancer uses the correction coefficients for correcting the I/Q gain and I/Q phase errors on a packet-by-packet basis. Optionally, delay devices delay the I and Q signals so that the correction coefficients may be applied to the entire packet, or the portion of the packet in the IQ measurement section is passed through uncorrected and the correction coefficients are applied to the packet after the IQ measurement section.Type: GrantFiled: August 7, 2003Date of Patent: September 6, 2005Assignee: Texas Instruments IncorporatedInventors: James E. C. Brown, Bret Rothenberg
-
Patent number: 6826246Abstract: A phase-locked loop (PLL) with reduced jitter is provided. The PLL includes dual path voltage-controlled oscillator inputs, with a control voltage from a loop filter sent through a low gain path and an integrated error voltage sent through a high gain path. The error voltage is derived from the difference between a reference value representing averaged control voltage and a predetermined portion of the control voltage.Type: GrantFiled: October 15, 1999Date of Patent: November 30, 2004Assignee: Agere Systems, Inc.Inventors: James E. C. Brown, Jeffrey Lee Sonntag
-
Publication number: 20040223558Abstract: A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.Type: ApplicationFiled: May 9, 2003Publication date: November 11, 2004Inventors: James E. C. Brown, Bret Rothenberg, Chienkuo Vincent Tien