Abstract: Row activation operations within a memory component are carried out with respect to subrows instead of complete storage rows to reduce power consumption. Further, instead of activating subrows in response to row commands, subrow activation operations are deferred until receipt of column commands that specify the column operation to be performed and the subrow to be activated.

Abstract: In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

Abstract: In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

Abstract: A micro-segmenting networked controller device receives network traffic information from at least one micro-segmenting network devices. At least two of the micro-segmenting networked devices are communicatively coupled to at least one micro-segment within a network. The network is configured to communicatively couple at least two hosts. Traffic flow data is generated from the network traffic information. Network micro-segment traffic rules are augmented employing, at least in part, at least some of the traffic flow data. Authority is received to implement the rules from at least two entities each serving at least one of a multitude of roles. At least one of the micro-segmenting networked devices are programmed to control traffic flow within at least one micro-segment employing the network micro-segment traffic rules.

Abstract: Row activation operations within a memory component are carried out with respect to subrows instead of complete storage rows to reduce power consumption. Further, instead of activating subrows in response to row commands, subrow activation operations are deferred until receipt of column commands that specify the column operation to be performed and the subrow to be activated.

Abstract: A self-resetting pixel having a memory element to record occurrence of an asynchronous pixel reset and circuitry to enable the memory element to be digitally sampled and cleared is disclosed, together with embodiments of digital image sensors formed by arrays or other collections of such pixels. By marking occurrence of asynchronous reset events within an in-pixel memory element that may be digitally oversampled during an exposure interval (i.e., repeatedly read-out in the form of, for example, a single-bit), it becomes possible to check for and detect asynchronous pixel reset events frequently and efficiently.

Abstract: In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

Abstract: A pixel array within an integrated-circuit image sensor is exposed to light representative of a scene during a first frame interval and then oversampled a first number of times within the first frame interval to generate a corresponding first number of frames of image data from which a first output image may be constructed. One or more of the first number of frames of image data are evaluated to determine whether a range of luminances in the scene warrants adjustment of an oversampling factor from the first number to a second number, if so, the oversampling factor is adjusted such that the pixel array is oversampled the second number of times within a second frame interval to generate a corresponding second number of frames of image data from which a second output image may be constructed.

Abstract: Row activation operations within a memory component are carried out with respect to subrows instead of complete storage rows to reduce power consumption. Further, instead of activating subrows in response to row commands, subrow activation operations are deferred until receipt of column commands that specify the column operation to be performed and the subrow to be activated.

Abstract: An integrated-circuit image sensor generates, as constituent reference voltages of a first voltage ramp, a first sequence of linearly related reference voltages followed by a second sequence of exponentially related reference voltages. The integrated-circuit image sensor compares the constituent reference voltages of the first voltage ramp with a first signal level representative of photocharge integrated within a pixel of the image sensor to identify a first reference voltage of the constituent reference voltages that is exceeded by the first signal level.

Abstract: Pixel circuits in an image sensor are sampled repetitively during an image frame period. At each sampling, a signal indicative of the photocharge integrated by a pixel circuit since last reset is compared to a threshold. If the integrated photocharge signal has not reached the threshold, the pixel circuit is permitted to continue integrating photocharge. If the integrated photocharge signal has reached the threshold, the pixel circuit is reset to remove integrated photocharge and photocharge integration for that pixel circuit is restarted. A corresponding pixel circuit value is recorded for the reset pixel circuit.

Abstract: An image sensor architecture with multi-bit sampling is implemented within an image sensor system. A pixel signal produced in response to light incident upon a photosensitive element is converted to a multiple-bit digital value representative of the pixel signal. If the pixel signal exceeds a sampling threshold, the photosensitive element is reset. During an image capture period, digital values associated with pixel signals that exceed a sampling threshold are accumulated into image data.

Abstract: An integrated-circuit image sensor generates, as constituent reference voltages of a first voltage ramp, a first sequence of linearly related reference voltages followed by a second sequence of exponentially related reference voltages.

Abstract: An apparatus comprising a housing, a gearing system disposed within the housing and comprising a plurality of targets, a plurality of sensors incorporated within the housing, a processor in electrical signal communication with the sensors, and a user interface in signal communication with the processor. A method comprising providing a drive system comprising a drive system power measuring and diagnostic system, wherein the drive system is configured to rotate one or more components comprising a plurality of targets, sense the targets with a sensor pair, thereby producing a data signal, process the data signal from the one or more sensor pairs, thereby producing a processed data signal, and output the processed data signal to a user.

Abstract: A method of increasing the control authority of redundant stability and control augmentation system (SCAS) actuators by utilizing feedback between systems such that one system may compensate for the position of a failed actuator of the other system. Each system uses an appropriate combination of reliable and unreliable inputs such that unreliable inputs cannot inappropriately utilize the increased authority. Each system may reconfigure itself when the other system actuator fails at certain positions so that the pilot or other upstream input maintains sufficient control authority of the aircraft.

Abstract: In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

Abstract: Components of a memory system, such as a memory controller and a memory device, that reduce delay in exiting self-refresh mode by controlling the refresh timing of the memory device. The memory device includes a memory core. An interface circuit of the memory device receives an external refresh signal indicating an intermittent refresh event. A refresh circuit of the memory device generates an internal refresh signal indicating an internal refresh event of the memory device. A refresh control circuit of the memory device performs a refresh operation on a portion of the memory core responsive to the internal refresh event, at a time relative to the intermittent refresh event indicated by the external refresh signal.

Abstract: In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

Abstract: In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

Abstract: A refrigeration system including a first compressor and a second compressor, operating in tandem, wherein the first compressor includes a compression capacity different than the compression capacity of the second compressor. A method for operating a refrigeration system including a first compressor and a second compressor operating in tandem; wherein the first compressor comprises a first compression capacity and the second compressor comprises a second compression capacity larger than the first compression capacity the method comprising the steps of: determining a cooling demand; operating the first compressor in a first stage of cooling; operating the second compressor in a second stage of cooling; and operating the first compressor and the second compressor in a third stage of cooling.