Patents by Inventor James E. Hopkins

James E. Hopkins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080252323
    Abstract: A method and apparatus for testing micro SD devices each having a plurality of electrical leads is described. The method and apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252322
    Abstract: A method for testing System-In-Package (SIP) devices such as micro SD devices each having a plurality of electrical leads is described. The method utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252317
    Abstract: Apparatus for testing System-In-Package (SIP) devices is described. The apparatus utilizes industry standard JEDEC trays and transports the trays into a tester.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252313
    Abstract: A method for testing System-In-Package (SIP) devices each having a plurality of electrical contacts is described. The method and apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: 5563703
    Abstract: An apparatus for and method of determining the coplanarity of leads of a semiconductor device is provided. The apparatus comprises a base (24) for placing the semiconductor device, and a plurality of mirrors (38) and (36) surrounding the base. The mirrors reflect an image of the leads of the semiconductor device to a camera. The camera records an image from which the lead coplanarity is determined. The base contains an optical datum (34) which provides a reference plane from which to measure coplanarity. The mirrors can be placed such that an off-axis image of the leads is reflected to the camera. The off-axis image improves the apparent sensitivity of the coplanarity measurement.
    Type: Grant
    Filed: October 10, 1995
    Date of Patent: October 8, 1996
    Assignee: Motorola, Inc.
    Inventors: Christopher J. Lebeau, James E. Hopkins
  • Patent number: 4756533
    Abstract: A unique promotional lottery game combining both skill and chance is provided. Multiple jig saw puzzles, with identical jig saw patterns, are played by contestants simultaneously, puzzle pieces for all the puzzles received from a common, unsegregated, pool. Each contestant is challenged to separate the puzzle pieces using only visual clues on their faces, to place the puzzle pieces in the correct places, and to collect all the pieces needed to solve one or more puzzles. The game readily is combined with other promotional games, such as instant win games and sweepstake games.
    Type: Grant
    Filed: December 24, 1986
    Date of Patent: July 12, 1988
    Inventors: James E. Hopkins, William H. Newbauer