Abstract: A selector circuit (12) for placing a memory device (10) in test mode. The selector circuit (12) uses a logic circuit (26) to determine when a control signal provided to a pin of the memory device (10) maintains a first logic level for a period of time exceeding the specification for the control signal in normal operation. A multiplexer (24) receives the control signal and a substitute control signal at an alternate pin of the memory device. The substitute control signal is used in place of the control signal during the test. The output of the logic circuit (26) is coupled to control the multiplexer (24) to select the control signal for use in addressing a cell of the memory device (10) in normal operation and to select the substitute control signal for use in addressing a cell of the memory device (10) in test mode.

Abstract: An integrated circuit package allows coupling of an integrated device within the package to the signal terminals of the package according to more than one connection pattern. The connection pattern is realized by coupling multiplexers between the integrated device and the signal terminals such that the pattern of coupling between the integrated device and the signal terminals can be controlled by a control signal. The control signal can be produced external to the package or within the package. In response to a control signal of the first state, the signal terminals are connected to the integrated device in a first pattern. In response to the control signal in the second state, the signal terminals are connected to the integrated device in a second pattern, different from the first pattern. In one embodiment, the first pattern and second pattern are mirror images to allow the packages to be mounted to opposite sides of a module while minimizing routing difficulties.

Abstract: A selector circuit (12) for placing a memory device (10) in test mode. The selector circuit (12) uses a logic circuit (26) to determine when a control signal provided to a pin of the memory device (10) maintains a first logic level for a period of time exceeding the specification for the control signal in normal operation. A multiplexer (24) receives the control signal and a substitute control signal at an alternate pin of the memory device. The substitute control signal is used in place of the control signal during the test. The output of the logic circuit (26) is coupled to control the multiplexer (24) to select the control signal for use in addressing a cell of the memory device (10) in normal operation and to select the substitute control signal for use in addressing a cell of the memory device (10) in test mode.

Abstract: An integrated circuit includes an integrated circuit die mounted in a package having a plurality of externally accessible contacts. A functional circuit, such as a memory circuit, is formed on the integrated circuit die and is coupled through bonding pads to the external contacts of the integrated circuit. A test circuit is also formed on the integrated circuit die to allow performance parameters to be determined by performing tests on the test circuit when the test circuit is in wafer form before packaging. To allow tests to be performed on the test circuit after packaging, a switch circuit formed on the integrated circuit die selectively couples input/output terminals of the test circuit to respective bonding pads that are connected to the externally accessible contacts.

Abstract: The present invention teaches fabrication of a high-resistance integrated circuit diffusion resistor that uses standard CMOS process steps. By appropriate masking during ion-implantation of source/drain diffusion regions, diffusion resistors created during NMOS source/drain implant may be counterdoped during PMOS source/drain implants and vice-versa. By appropriate choice of relative concentrations of a resistor dopant and counterdopant, and choice of diffusion depths, junction diodes can be formed which create a pinched resistor by constricting the current flow. The relative dopant concentrations can also be chosen to create regions of light effective doping within the diffusion resistor rather than creating junction diodes.

Abstract: An improved water-based printing ink composition comprising, in aqueous medium, a colorant selected from the group consisting of a dispersed dye, a pigment, and mixtures thereof; and a water-insoluble non-sulfonated lignin acetate binder for the colorant. Also disclosed is a method of producing the improved water-based printing ink composition by reductively acetylating a non-sulfonated lignin to form a lignin acetate, drying the lignin acetate, and combining the dried lignin acetate in aqueous medium with a printing ink colorant.