Abstract: Formation of methanoic acid, during the production of Hexahydro-1,3,5-trinitro-1,3,5-triazine and Octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine via the legacy Bachmann nitrolysis process, is avoided when the workup is performed under neutralized, anhydrous conditions. The recovered anhydrous spent acid is used directly in successive nitrolysis batches with minimal processing. The yield and quality of the hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine thus produced is equal to the yield and quality of the legacy process hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine employing aqueous workup conditions.

Abstract: Formation of methanoic acid, during the production of Hexahydro-1,3,5-trinitro-1,3,5-triazine and Octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine via the legacy Bachmann nitrolysis process, is avoided when the workup is performed under neutralized, anhydrous conditions. The recovered anhydrous spent acid is used directly in successive nitrolysis batches with minimal processing. The yield and quality of the hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine thus produced is equal to the yield and quality of the legacy process hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine employing aqueous workup conditions.

Abstract: During the production of Hexahydro-1,3,5-trinitro-1,3,5-triazine and Octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine via the Bachmann nitrolysis process, it is necessary to recover the entire mass of acetic acid and restore it to an anhydrous state via azeotropic distillation. The azeotropic distillation process is resource intensive and is a limiting step with respect to time. Limiting the amount of water in the spent acetic acid allows restoration of an anhydrous state by the addition of acetic anhydride and avoiding azeotropic distillation. The amount of ammonium nitrate in the resulting anhydrous spent acid is accounted for, and the recovered anhydrous spent acid is used directly in successive nitrolysis batches with minimal processing.

Abstract: Formation of methanoic acid, during the production of Hexahydro-1,3,5-trinitro-1,3,5-triazine and Octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine via the legacy Bachmann nitrolysis process, is avoided when the workup is performed under neutralized, anhydrous conditions. The recovered anhydrous spent acid is used directly in successive nitrolysis batches with minimal processing. The yield and quality of the hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine thus produced is equal to the yield and quality of the legacy process hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine employing aqueous workup conditions.

Abstract: Formation of methanoic acid, during the production of Hexahydro-1,3,5-trinitro-1,3,5-triazine and Octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine via the legacy Bachmann nitrolysis process, is avoided when the workup is performed under neutralized, anhydrous conditions. The recovered anhydrous spent acid is used directly in successive nitrolysis batches with minimal processing. The yield and quality of the hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine thus produced is equal to the yield and quality of the legacy process hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine employing aqueous workup conditions.

Abstract: Formation of methanoic acid, during the production of Hexahydro-1,3,5-trinitro-1,3,5-triazine and Octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine via the legacy Bachmann nitrolysis process, is avoided when the workup is performed under neutralized, anhydrous conditions. The recovered anhydrous spent acid is used directly in successive nitrolysis batches with minimal processing. The yield and quality of the hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine thus produced is equal to the yield and quality of the legacy process hexahydro-1,3,5-trinitro-1,3,5-triazine and octahydro-1,3,5,7-tetranitro-1,3,5,7-tetrazocine employing aqueous workup conditions.

Abstract: A processor includes a core and a scheduler. The scheduler includes first and second dependency matrices and a ready determination unit. The scheduler also includes logic to queue a first parent operation, a second parent operation, and a child operation that includes first and second sources dependent on the first and second parent operations. The scheduler also includes logic to store physical addresses of the first and second sources of the child operation respectively in the first and second dependency matrices. Further, the scheduler includes logic to perform a tag comparisons between the respective physical addresses of the destinations of the first and second parent operations respectively with the respective physical address of the first and second sources of the child operation. In addition, the ready determination unit includes logic to determine that the child operation is ready for dispatch based on the tag comparisons.

Abstract: An example disclosed method includes querying, via a logic circuit, a media processing device memory for files that can be stored to a USB storage device, the USB storage device being connected to a USB Host port of the media processing device; receiving a selection of one of the files to be stored to the USB storage device; determining, via the logic circuit, if the selected one of the files is a particular type of file, and if the selected one of the files is the particular type of file, converting the selected one of the files from a first representation to a second representation; and storing the selected one of the files in the second representation to the USB storage device.

Abstract: A computer system and processor for elimination of move operations include circuits that obtain a computer instruction and bypass execution units in response to determining that the instruction includes a move operation that involves a transfer of data from a logical source register to a logical destination register. Instead of executing the move operation, the transfer of the data is performed by tracking changes in data dependencies of the source and the destination registers, and assigning a physical register associated with the source register to the destination register based on the dependencies.

Abstract: A processor includes a core and a scheduler. The scheduler includes first and second dependency matrices and a ready determination unit. The scheduler also includes logic to queue a first parent operation, a second parent operation, and a child operation that includes first and second sources dependent on the first and second parent operations. The scheduler also includes logic to store physical addresses of the first and second sources of the child operation respectively in the first and second dependency matrices. Further, the scheduler includes logic to perform a tag comparisons between the respective physical addresses of the destinations of the first and second parent operations respectively with the respective physical address of the first and second sources of the child operation. In addition, the ready determination unit includes logic to determine that the child operation is ready for dispatch based on the tag comparisons.

Abstract: An apparatus including an execution logic that includes circuitry to execute instructions, and an instruction execution scheduler logic coupled with the execution logic. The instruction execution scheduler logic is to receive an execute at commit state update instruction. The instruction execution scheduler logic includes at commit state update logic that is to wait to schedule the execute at commit state update instruction for execution until the execute at commit state update instruction is a next instruction to commit. Other apparatus, methods, and systems are also disclosed.

Abstract: Methods and apparatus relating to dynamic selection of execution stage are described. In some embodiments, logic may determine whether to execute an instruction at one of a plurality of stages in a processor. In some embodiments, the plurality of stages are to at least correspond to an address generation stage or an execution stage of the instruction. Other embodiments are also described and claimed.

Abstract: In an embodiment, a processor includes a plurality of cores. Each core includes conversion power logic to receive an instruction including an untranslated memory address, determine whether a code segment (CS) base address is equal to zero, and in response to a determination that the CS base address is equal to zero, execute the instruction using the untranslated memory address. Other embodiments are described and claimed.

Abstract: A computer system and processor for elimination of move operations include circuits that obtain a computer instruction and bypass execution units in response to determining that the instruction includes a move operation that involves a transfer of data from a logical source register to a logical destination register. Instead of executing the move operation, the transfer of the data is performed by tracking changes in data dependencies of the source and the destination registers, and assigning a physical register associated with the source register to the destination register based on the dependencies.

Abstract: An apparatus including an execution logic that includes circuitry to execute instructions, and an instruction execution scheduler logic coupled with the execution logic. The instruction execution scheduler logic is to receive an execute at commit state update instruction. The instruction execution scheduler logic includes at commit state update logic that is to wait to schedule the execute at commit state update instruction for execution until the execute at commit state update instruction is a next instruction to commit. Other apparatus, methods, and systems are also disclosed.

Abstract: Methods and apparatus relating to dynamic selection of execution stage are described. In some embodiments, logic may determine whether to execute an instruction at one of a plurality of stages in a processor. In some embodiments, the plurality of stages are to at least correspond to an address generation stage or an execution stage of the instruction. Other embodiments are also described and claimed.

Abstract: Methods and apparatus to generate addresses in processors are disclosed. An example address generator disclosed herein includes an adder to add a first address component and a second address component to generate an address, a correction indicator to indicate if the address is correct, and a control input to modify an operation of the adder.

Abstract: The present invention provides a method for purifying ruthenium sources to obtain high purity ruthenium metal and form a ruthenium metal pattern on a semiconductor substrate without the need for high temperature processing or a complex series of wet processes. A gas stream including ozone (O3) is brought into contact with a ruthenium source in one or more reaction vessels to form ruthenium tetraoxide (RuO4), a compound that is a gas at the reaction conditions. The ruthenium tetraoxide, along with unreacted ozone and the remainder of the gas stream is then fed into a collection vessel where the gaseous ruthenium tetraoxide is reduced to form a ruthenium dioxide (RuO2) layer on a semiconductor substrate. The deposited ruthenium dioxide is then reduced, preferably with hydrogen, to produce highly pure ruthenium metal that may be, in turn, patterned and dry etched using ozone as an etchant gas.

Abstract: The present invention relates to an apparatus for obtaining high purity ruthenium metal without the need for high temperature processing, expensive reagents, complex series of wet processes, or expensive equipment. According to the present invention, a gas stream including ozone (O3) is brought into contact with a ruthenium source in one or more reaction vessels. The ozone reacts with the ruthenium source to form ruthenium tetraoxide (RuO4), a compound that is a gas at the reaction conditions. The ruthenium tetraoxide, along with unreacted ozone and the remainder of the gas stream is then fed into a collection vessel where a major portion of the m gaseous ruthenium tetraoxide is thermally reduced to form ruthenium dioxide (RuO2) deposits within the collection vessel. The deposited ruthenium dioxide is then reduced to produce highly pure ruthenium metal.

Abstract: The present invention provides a method for purifying ruthenium sources to obtain high purity ruthenium metal without the need for high temperature processing, expensive reagents, complex series of wet processes, or expensive equipment. According to the present invention, a gas stream including ozone (O3) is brought into contact with a ruthenium source, such as a commercial ruthenium metal sponge, in one or more reaction vessels. The ozone reacts with the ruthenium present in the ruthenium source to form ruthenium tetraoxide (RuO4), a compound that is a gas at the reaction conditions. The ruthenium tetraoxide, along with unreacted ozone and the remainder of the gas stream is then fed into a collection vessel where a major portion of the gaseous ruthenium tetraoxide is thermally reduced to form ruthenium dioxide (RuO2) deposits within the collection vessel.