Patents by Inventor James G. Deak
James G. Deak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6946302Abstract: An improved magnetic memory element is provided in which a magnetic sense layer is formed of two ferromagnetic material layers separated by a spacer layer. The two ferromagnetic layers are formed as a synthetic ferrimagnet with stray field coupling and antiferromagnetic exchange coupling across the spacer layer.Type: GrantFiled: January 23, 2004Date of Patent: September 20, 2005Assignee: Micron Technology Inc.Inventor: James G. Deak
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Patent number: 6921953Abstract: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.Type: GrantFiled: April 9, 2003Date of Patent: July 26, 2005Assignee: Micron Technology, Inc.Inventor: James G. Deak
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Patent number: 6906396Abstract: Structures and methods for providing magnetic shielding for integrated circuits are disclosed. The shielding comprises a foil or sheet of magnetically permeable material applied to an outer surface of a molded (e.g., epoxy) integrated circuit package. The foil can be held in place by adhesive or by mechanical means. The thickness of the shielding can be tailored to a customer's specific needs, and can be applied after all high temperature processing, such that a degaussed shield can be provided despite use of strong magnetic fields during high temperature processing, which fields are employed to maintain pinned magnetic layers within the integrated circuit.Type: GrantFiled: January 15, 2002Date of Patent: June 14, 2005Assignee: Micron Technology, Inc.Inventors: Mark E. Tuttle, James G. Deak
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Patent number: 6885576Abstract: A closed flux magnetic memory cell has a ferromagnetic pinned structure and a ferromagnetic free structure. Data is stored by controlling the relative magnetization between the pinned and free structures. The free structure is formed as a horizontally extending toroid, or tube, that is insulated from the pinned structure. A first conductive line passes through the center of the free structure while a second conductive line is connected to the pinned structure. A third conductive line can be formed through the free structure. This line is insulated from the toroid and the first conductor. The third conductive line can also be located outside the free structure. In operation of one embodiment, the first and third conductive lines are used to control the magnetized direction of the free structure. A resistance between the first and second conductive lines defines the data stored in the memory cell.Type: GrantFiled: August 13, 2002Date of Patent: April 26, 2005Assignee: Micron Technology, Inc.Inventor: James G. Deak
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Patent number: 6833278Abstract: Systems, devices and methods are provided for magnetic memory elements with low remanence flux concentrators. Improved bit yield is attributable to reduced remanence in the flux concentrator. Remanence provides the memory element with a biasing magnetic field. The flux concentrator includes anisotropy aligned with an appropriate conductor. One aspect of the present subject matter is a memory cell. One memory cell embodiment includes a magnetic memory element and a flux concentrator operably positioned with respect to a conductor. The conductor is adapted to provide a current-induced magnetic flux to the magnetic memory element. The flux concentrator includes an easy axis of magnetization aligned with the conductor and a hard axis of magnetization orthogonal to the easy axis of magnetization. Other aspects are provided herein.Type: GrantFiled: February 24, 2004Date of Patent: December 21, 2004Assignee: Micron Technology, Inc.Inventor: James G. Deak
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Patent number: 6828639Abstract: MRAM structures employ the magnetic properties of layered magnetic and non-magnetic materials to read memory storage logic states. Improvements in switching reliability may be achieved by altering the shape of the layered magnetic stack structure. Forming recessed regions with sloped interior walls in an ILD layer prior to depositing the layered magnetic stack structure produces a significant advantage over the prior art by allowing a CMP process to be used to define the magnetic bit shapes. The sloped interior walls of the recessed regions, which is singular to the present invention, provide a unique formation and shaping of the magnetic stack structure, which may reduce the magnetic coupling effect between magnetic layers of the magnetic stack structure.Type: GrantFiled: July 17, 2002Date of Patent: December 7, 2004Assignee: Micron Technology, Inc.Inventors: Hasan Nejad, James G. Deak
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Patent number: 6816402Abstract: A write conductor layout structure for minimizing programming currents of an MRAM is disclosed. A magnetic memory cell has sense layer which is positioned between a first conductor having a width in a first direction and a second conductor having a width in a second direction. The width of the first and/or second conductor is narrower than a corresponding width of the sense layer. At least one of the first and second conductors is positioned so that the edge of the conductor extends beyond the edge of the sense layer.Type: GrantFiled: June 21, 2002Date of Patent: November 9, 2004Assignee: Micron Technology, Inc.Inventor: James G. Deak
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Patent number: 6807087Abstract: A magnetic random access memory (MRAM) is compensated for write current shunting by varying the bit size of each MRAM cell with position along the write line. The MRAM includes a plurality of magnetic tunnel junction memory cells arranged in an array of columns and rows. The width of each memory cell increases along a write line to compensate for write current shunting.Type: GrantFiled: August 30, 2002Date of Patent: October 19, 2004Assignee: Micron Technology, Inc.Inventor: James G. Deak
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Publication number: 20040201070Abstract: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.Type: ApplicationFiled: April 9, 2003Publication date: October 14, 2004Inventor: James G. Deak
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Publication number: 20040166618Abstract: Systems, devices and methods are provided for magnetic memory elements with low remanence flux concentrators. Improved bit yield is attributable to reduced remanence in the flux concentrator. Remanence provides the memory element with a biasing magnetic field. The flux concentrator includes anisotropy aligned with an appropriate conductor. One aspect of the present subject matter is a memory cell. One memory cell embodiment includes a magnetic memory element and a flux concentrator operably positioned with respect to a conductor. The conductor is adapted to provide a current-induced magnetic flux to the magnetic memory element. The flux concentrator includes an easy axis of magnetization aligned with the conductor and a hard axis of magnetization orthogonal to the easy axis of magnetization. Other aspects are provided herein.Type: ApplicationFiled: February 24, 2004Publication date: August 26, 2004Applicant: Micron Technology, Inc.Inventor: James G. Deak
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Patent number: 6781174Abstract: The invention includes a construction comprising an MRAM device between a pair of conductive lines. Each of the conductive lines can generate a magnetic field encompassing at least a portion of the MRAM device. Each of the conductive lines is surrounded on three sides by magnetic material to concentrate the magnetic fields generated by the conductive lines at the MRAM device. The invention also includes a method of forming an assembly containing MRAM devices. A plurality of MRAM devices are formed over a substrate. An electrically conductive material is formed over the MRAM devices, and patterned into a plurality of lines. The lines are in a one-to-one correspondence with the MRAM devices and are spaced from one another. After the conductive material is patterned into lines, a magnetic material is formed to extend over the lines and within spaces between the lines.Type: GrantFiled: November 21, 2002Date of Patent: August 24, 2004Assignee: Micron Technology, Inc.Inventors: Hasan Nejad, James G. Deak
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Patent number: 6780654Abstract: The invention includes a construction comprising an MRAM device between a pair of conductive lines. Each of the conductive lines can generate a magnetic field encompassing at least a portion of the MRAM device. Each of the conductive lines is surrounded on three sides by magnetic material to concentrate the magnetic fields generated by the conductive lines at the MRAM device. The invention also includes a method of forming an assembly containing MRAM devices. A plurality of MRAM devices are formed over a substrate. An electrically conductive material is formed over the MRAM devices, and patterned into a plurality of lines. The lines are in a one-to-one correspondence with the MRAM devices and are spaced from one another. After the conductive material is patterned into lines, a magnetic material is formed to extend over the lines and within spaces between the lines.Type: GrantFiled: December 16, 2002Date of Patent: August 24, 2004Assignee: Micron Technology, Inc.Inventors: Hasan Nejad, James G. Deak
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Patent number: 6780653Abstract: The invention includes a construction comprising an MRAM device between a pair of conductive lines. Each of the conductive lines can generate a magnetic field encompassing at least a portion of the MRAM device. Each of the conductive lines is surrounded on three sides by magnetic material to concentrate the magnetic fields generated by the conductive lines at the MRAM device. The invention also includes a method of forming an assembly containing MRAM devices. A plurality of MRAM devices are formed over a substrate. An electrically conductive material is formed over the MRAM devices, and patterned into a plurality of lines. The lines are in a one-to-one correspondence with the MRAM devices and are spaced from one another. After the conductive material is patterned into lines, a magnetic material is formed to extend over the lines and within spaces between the lines.Type: GrantFiled: June 6, 2002Date of Patent: August 24, 2004Assignee: Micron Technology, Inc.Inventors: Hasan Nejad, James G. Deak
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Publication number: 20040160810Abstract: A magnetic random access memory device including a pinned layer having a diffusion barrier, a sense layer, and a tunnel barrier to electrically couple the pinned layer to the sense layer. A method for forming a magnetic random access memory device including forming, on a substrate, a sense layer, forming a tunnel barrier on the sense layer, forming a pinned layer on the tunnel barrier, where the pinned layer includes a diffusion barrier to stop manganese atoms from diffusing to the interface of the tunnel barrier, and annealing the substrate, the sense layer, the tunnel barrier and the pinned layer. The diffusion barrier can include a native oxide having a thickness up to about seven angstroms or an aluminum oxide having a thickness up to about seven angstroms.Type: ApplicationFiled: February 18, 2003Publication date: August 19, 2004Applicant: Micron Technology, Inc.Inventors: James G. Deak, Maciej M. Kowalewski
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Publication number: 20040152218Abstract: An improved magnetic memory element is provided in which a magnetic sense layer is formed of two ferromagnetic material layers separated by a spacer layer. The two ferromagnetic layers are formed as a synthetic ferrimagnet with stray field coupling and antiferromagnetic exchange coupling across the spacer layer.Type: ApplicationFiled: January 23, 2004Publication date: August 5, 2004Inventor: James G. Deak
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Publication number: 20040152265Abstract: The present invention provides a method of forming an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor in a trench is provided in an insulating layer and an upper surface of the insulating layer and the first conductor is planarized. Then, a dielectric layer is deposited to a thickness slightly greater than the desired final thickness of a sense layer, which is formed later. The dielectric layer is then patterned and etched to form an opening for the cell shapes over the first conductor. Then, a permalloy is electroplated in the cell shapes to form the sense layer. The sense layer and dielectric layer are flattened and then a nonmagnetic tunnel barrier layer is deposited. Finally, the pinned layer is formed over the tunnel barrier layer.Type: ApplicationFiled: January 22, 2004Publication date: August 5, 2004Inventors: Hasan Nejad, James G. Deak
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Publication number: 20040119095Abstract: Structures and methods for providing magnetic shielding for integrated circuits are disclosed. The shielding comprises a foil or sheet of magnetically permeable material applied to an outer surface of a molded (e.g., epoxy) integrated circuit package. The foil can be held in place by adhesive or by mechanical means. The thickness of the shielding can be tailored to a customer's specific needs, and can be applied after all high temperature processing, such that a degaussed shield can be provided despite use of strong magnetic fields during high temperature processing, which fields are employed to maintain pinned magnetic layers within the integrated circuit.Type: ApplicationFiled: November 21, 2003Publication date: June 24, 2004Inventors: Mark E. Tuttle, James G. Deak
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Patent number: 6728132Abstract: An improved magnetic memory element is provided in which a magnetic sense layer is formed of two ferromagnetic material layers separated by a spacer layer. The two ferromagnetic layers are formed as a synthetic ferrimagnet with stray field coupling and antiferromagnetic exchange coupling across the spacer layer.Type: GrantFiled: April 3, 2002Date of Patent: April 27, 2004Assignee: Micron Technology, Inc.Inventor: James G. Deak
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Patent number: 6724652Abstract: Systems, devices and methods are provided for magnetic memory elements with low remanence flux concentrators. Improved bit yield is attributable to reduced remanence in the flux concentrator. Remanence provides the memory element with a biasing magnetic field. The flux concentrator includes anisotropy aligned with an appropriate conductor. One aspect of the present subject matter is a memory cell. One memory cell embodiment includes a magnetic memory element and a flux concentrator operably positioned with respect to a conductor. The conductor is adapted to provide a current-induced magnetic flux to the magnetic memory element. The flux concentrator includes an easy axis of magnetization aligned with the conductor and a hard axis of magnetization orthogonal to the easy axis of magnetization. Other aspects are provided herein.Type: GrantFiled: May 2, 2002Date of Patent: April 20, 2004Assignee: Micron Technology, Inc.Inventor: James G. Deak
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Publication number: 20040066667Abstract: A magnetic random access memory (MRAM) is compensated for write current shunting by varying the bit size of each MRAM cell with position along the write line. The MRAM includes a plurality of magnetic tunnel junction memory cells arranged in an array of columns and rows. The width of each memory cell increases along a write line to compensate for write current shunting.Type: ApplicationFiled: August 29, 2002Publication date: April 8, 2004Inventor: James G. Deak