Patents by Inventor James G. Maveety
James G. Maveety has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20070297151Abstract: An integrated circuit including an interlayer dielectric which may be prone to failure due to processing conditions may be protected by coupling the integrated circuit to a substrate through a solder ball over a conductive polymer. The conductive polymer allows conduction of electrical current to or from the integrated circuit and also provides cushioning against stresses including both mechanical perturbations and thermal expansion and contraction. As a result, relatively lower dielectric constant materials may be utilized as interlayer dielectrics within the integrated circuit.Type: ApplicationFiled: June 27, 2006Publication date: December 27, 2007Inventors: Larry E. Mosley, James G. Maveety, Fay Hua
-
Patent number: 7274106Abstract: An integrated electroosmotic pump may be incorporated in the same integrated circuit package with a re-combiner, and an integrated circuit chip to be cooled by fluid pumped by the electroosmotic pump.Type: GrantFiled: September 24, 2003Date of Patent: September 25, 2007Assignee: Intel CorporationInventors: Sarah E. Kim, R. Scott List, James G. Maveety, Alan M. Myers, Quat T. Vu
-
Patent number: 7084495Abstract: A stack of heat generating integrated circuit chips may be provided with intervening cooling integrated circuit chips. The cooling integrated circuit chips may include microchannels for the flow of the cooling fluid. The cooling fluid may be pumped using the integrated electroosmotic pumps. Removal of cooling fluid gases may be accomplished using integrated re-combiners in some embodiments.Type: GrantFiled: October 16, 2003Date of Patent: August 1, 2006Assignee: Intel CorporationInventors: Sarah E. Kim, R. Scott List, James G. Maveety, Alan M. Myers, Quat T. Vu
-
Patent number: 7021891Abstract: A back-to-back double-flow bi-directional thrust-balanced micro-impeller for use in optimized compression cycles of small volumetric flow rates is provided. The back-to-back micro-impeller is a component of a compressor capable of generating a pressure head suitable for maintaining the flow rate needed for dissipating heat, such as produced by an electronic component. The back-to-back micro-impeller provides a fluid path on both sides of the micro-impeller, imparting an equal momentum (or velocity) to the fluid. The left and right compressor sections provide a balancing of forces generated by high-pressure fluid against the two sides of the micro-impeller. This reduces vibrational forces and provides a balancing force on the shaft which reduces the thrust on the shaft in a direction away from the gas flow path. Also, the approximately equally distributed mass about the rotation axis X, provides for a balanced impeller which is desirable when operated at high rotation speeds.Type: GrantFiled: December 18, 2002Date of Patent: April 4, 2006Assignee: Intel CorporationInventors: Eduardo A. Sanchez, James G. Maveety, Gregory M. Chrysler
-
Patent number: 6992381Abstract: An integrated circuit to be cooled may be abutted in face-to-face abutment with a cooling integrated circuit. The cooling integrated circuit may include electroosmotic pumps to pump cooling fluid through the cooling integrated circuits via microchannels to thereby cool the heat generating integrated circuit. The electroosmotic pumps may be fluidically coupled to external radiators which extend upwardly away from a package including the integrated circuits. In particular, the external radiators may be mounted on tubes which extend the radiators away from the package.Type: GrantFiled: October 31, 2003Date of Patent: January 31, 2006Assignee: Intel CorporationInventors: Sarah E. Kim, R. Scott List, James G. Maveety, Alan M. Myers, Quat T. Vu, Ravi Prasher, Ravi Mahajan, Gilroy Vandentop
-
Patent number: 6988531Abstract: A method and arrangement for dissipating heat from a localized area within a semiconductor die is presented. A semiconductor die is constructed and arranged to have at least one conduit portion therein. At least a portion of the conduit portion is proximate to the localized area. The conduit portion is at least partially filled with a heat-dissipating material. The conduit portion absorbs heat from the localized area and dissipates at least a portion of the heat away from the localized area. As such, thermal stress on the die is reduced, and total heat from the die is more readily dissipated.Type: GrantFiled: January 11, 2002Date of Patent: January 24, 2006Assignee: Intel CorporationInventors: Gregory M. Chrysler, James G. Maveety
-
Patent number: 6924170Abstract: An electronic device includes a die further having a first major surface, and a second major surface. The electronic device also includes a plurality of connectors associated with the first major surface of the die, and an integrated heat spreader in thermally conductive relation with the second major surface of the die. The integrated heat spreader also has a layer of silicon, and a layer of diamond attached to the layer of silicon. The first major surface of the die attached to a printed circuit board. A method for forming a heat dissipating device includes placing a layer of diamond on a silicon substrate, and thinning the silicon substrate. The substrate is diced to form a plurality of heat dissipating devices sized to form a thermally conductive connection to a die. A surface of the silicon substrate is placed in thermal communication with a source of heat.Type: GrantFiled: June 30, 2003Date of Patent: August 2, 2005Assignee: Intel CorporationInventors: Kramadhati V. Ravi, James G. Maveety
-
Patent number: 6906919Abstract: According to one embodiment of the present invention, a cooling apparatus for notebook computer systems is disclosed. The apparatus includes: an evaporator coupled to a heat generating device to extract the generated heat away from the device, the device being installed inside a notebook computer, a heat exchanger coupled to the evaporator; a transport medium to flow inside the evaporator and the heat exchanger to transfer the generated heat from the device to the heat exchanger; and a pump attached to the evaporator and the heat exchanger to force the transport medium between the evaporator and the heat exchanger.Type: GrantFiled: September 30, 2003Date of Patent: June 14, 2005Assignee: Intel CorporationInventors: Himanshu Pokharna, Eric DiStefano, James G. Maveety, Ravi Prasher
-
Publication number: 20040266056Abstract: An electronic device includes a die further having a first major surface, and a second major surface. The electronic device also includes a plurality of connectors associated with the first major surface of the die, and an integrated heat spreader in thermally conductive relation with the second major surface of the die. The integrated heat spreader also has a layer of silicon, and a layer of diamond attached to the layer of silicon. The first major surface of the die attached to a printed circuit board. A method for forming a heat dissipating device includes placing a layer of diamond on a silicon substrate, and thinning the silicon substrate. The substrate is diced to form a plurality of heat dissipating devices sized to form a thermally conductive connection to a die. A surface of the silicon substrate is placed in thermal communication with a source of heat.Type: ApplicationFiled: June 30, 2003Publication date: December 30, 2004Inventors: Kramadhati V. Ravi, James G. Maveety
-
Publication number: 20040188817Abstract: A method and apparatus to minimize thermal impedance using copper on the die or chip backside. Some embodiments use deposited copper having a thickness chosen to complement a given chip thickness, in order to reduce or minimize wafer warpage. In some embodiments, the wafer, having a plurality of chips (e.g., silicon), is thinned (e.g., by chemical-mechanical polishing) before deposition of the copper layer, to reduce the thermal resistance of the chip. Some embodiments further deposit copper in a pattern of bumps, raised areas, or pads, e.g., in a checkerboard pattern, to thicken and add copper while reducing or minimizing wafer warpage and chip stress.Type: ApplicationFiled: March 31, 2003Publication date: September 30, 2004Applicant: Intel CorporationInventors: Fay Hua, Gregory M. Chrysler, James G. Maveety, K. V. Ravi
-
Patent number: 6785134Abstract: Apparatus and methods in accordance with the present invention provide self-contained, closed-loop microchannel/electrokinetic pump cooling systems that can be integrated into the microelectronic die and the integrated heat sink to provide microelectronic die cooling. Microchannel/electrokinetic pump cooling systems utilize active cooling technology to reduce thermal gradients and operating temperature of a microelectronic die. This system disclosed here will enhance heat dissipation and provide immediate cooling of localized hot spots within the microelectronic die. This will have the effect of reducing the microelectronic die temperature or spreading the heat internally within the microelectronic die depending on the layout of the microchannels.Type: GrantFiled: January 6, 2003Date of Patent: August 31, 2004Assignee: Intel CorporationInventors: James G. Maveety, Gregory M. Chrysler, Michael C. Garner
-
Publication number: 20040130874Abstract: Apparatus and methods in accordance with the present invention provide self-contained, closed-loop microchannel/electrokinetic pump cooling systems that can be integrated into the microelectronic die and the integrated heat sink to provide microelectronic die cooling. Microchannel/electrokinetic pump cooling systems utilize active cooling technology to reduce thermal gradients and operating temperature of a microelectronic die. This system disclosed here will enhance heat dissipation and provide immediate cooling of localized hot spots within the microelectronic die. This will have the effect of reducing the microelectronic die temperature or spreading the heat internally within the microelectronic die depending on the layout of the microchannels.Type: ApplicationFiled: January 6, 2003Publication date: July 8, 2004Inventors: James G. Maveety, Gregory M. Chrysler, Michael C. Garner
-
Publication number: 20040120802Abstract: A back-to-back double-flow bi-directional thrust-balanced micro-impeller for use in optimized compression cycles of small volumetric flow rates is provided. The back-to-back micro-impeller is a component of a compressor capable of generating a pressure head suitable for maintaining the flow rate needed for dissipating heat, such as produced by an electronic component. The back-to-back micro-impeller provides a fluid path on both sides of the micro-impeller, imparting an equal momentum (or velocity) to the fluid. The left and right compressor sections provide a balancing of forces generated by high-pressure fluid against the two sides of the micro-impeller. This reduces vibrational forces and provides a balancing force on the shaft which reduces the thrust on the shaft in a direction away from the gas flow path. Also, the approximately equally distributed mass about the rotation axis X, provides for a balanced impeller which is desirable when operated at high rotation speeds.Type: ApplicationFiled: December 18, 2002Publication date: June 24, 2004Inventors: Eduardo A. Sanchez, James G. Maveety, Gregory M. Chrysler
-
Patent number: 6650542Abstract: Embodiments in accordance with the present invention provides active thermal management of the heat generated at localized hot spots on the microelectronic die by using fluid impingement cooling. The combination of orifices constructed using piezoelectric microelectromechanical systems (MEMs) technology, fluid impingement for maximizing the heat transfer coefficient, and embedded thermal diodes within the microelectronic die for measuring local temperature, to produce an active, closed-loop flow-control system for managing hot spots. A small reservoir of fluid is stationed a small distance above the die. The base of the reservoir has an array of piezoelectric orifices embedded within it, and positioned over the hotspot(s). The piezoelectric orifices can be opened and closed depending on the voltage applied.Type: GrantFiled: January 6, 2003Date of Patent: November 18, 2003Assignee: Intel CorporationInventors: Gregory M. Chrysler, James G. Maveety
-
Publication number: 20030131968Abstract: A method and arrangement for dissipating heat from a localized area within a semiconductor die is presented. A semiconductor die is constructed and arranged to have at least one conduit portion therein. At least a portion of the conduit portion is proximate to the localized area. The conduit portion is at least partially filled with a heat-dissipating material. The conduit portion absorbs heat from the localized area and dissipates at least a portion of the heat away from the localized area. As such, thermal stress on the die is reduced, and total heat from the die is more readily dissipated.Type: ApplicationFiled: January 11, 2002Publication date: July 17, 2003Inventors: Gregory M. Chrysler, James G. Maveety
-
Patent number: 6490167Abstract: In an embodiment of the present invention, an apparatus to eject a semiconductor package from a semiconductor package socket includes a package ejector coupled to a semiconductor package socket. The package ejector can include an ejector cam and be coupled to an upper surface of the semiconductor package socket.Type: GrantFiled: November 10, 1999Date of Patent: December 3, 2002Assignee: Intel CorporationInventors: Michael Philip Brownell, James G. Maveety, Richard Michael Ramirez, William Arthur Samaras
-
Patent number: 6410982Abstract: Embodiments of the present invention can dissipate heat and include a top wall including a plurality of hollow fins, a bottom wall, and a plurality of side walls that define an inner cavity. A plurality of condenser regions can be located within the inner cavity, and each one of the plurality of condenser regions can be located within one of the plurality of hollow fins. The inner cavity also can include an evaporator region adjacent said bottom wall.Type: GrantFiled: November 12, 1999Date of Patent: June 25, 2002Assignee: Intel CorporationInventors: Michael Philip Brownell, James G. Maveety
-
Publication number: 20020056908Abstract: Embodiments of the present invention can dissipate heat and include a top wall including a plurality of hollow fins, a bottom wall, and a plurality of side walls that define an inner cavity. A plurality of condenser regions can be located within the inner cavity, and each one of the plurality of condenser regions can be located within one of the plurality of hollow fins. The inner cavity also can include an evaporator region adjacent said bottom wall.Type: ApplicationFiled: November 12, 1999Publication date: May 16, 2002Inventors: MICHAEL PHILIP BROWNELL, JAMES G. MAVEETY
-
Patent number: 6350136Abstract: A socket comprising an electrically conductive element, the element situated within a well such that a first end of the element extends above a first surface of the socket, the element capable of flexing to exert a first force on a pin inserted into the well upon application of a second force by a descending surface to the first end of the element.Type: GrantFiled: December 14, 1998Date of Patent: February 26, 2002Assignee: Intel CorporationInventors: Michael Z. Eckblad, James G. Maveety
-
Patent number: 5948204Abstract: The present invention discloses an improvement on a wafer carrier ring for use in a chemical-mechanical polishing apparatus for uniformly polishing semiconductor wafers. The apparatus comprises of a ring assembly, a stainless steel backing plate and a rubber bladder for holding the ring assembly and the backing plate. The ring assembly comprises of two rings. The first ring is made of a soft material such as Delrin or PBT for holding the stainless steel backing plate which is attached to the wafer. A top portion of the first ring is cutoff to leave an annular notch. The second ring is made of a hard material such as stainless steel and is fitted into the annular notch of the first ring. Both rings are attached to the rubber bladder through two sets of screws which are evenly spaced through a circular path concentric to the circumference of the first ring.Type: GrantFiled: December 30, 1996Date of Patent: September 7, 1999Assignee: Intel CorporationInventors: James G. Maveety, George T. Waller, Wayne Gaynor